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Use a critical section to listen on GPIO pins

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This commit is contained in:
Michael Beaumont 2021-03-09 14:23:02 +01:00
parent b490c8a48d
commit 6278ecf4b0
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GPG Key ID: 94C1243E6859F368
2 changed files with 34 additions and 36 deletions
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64
embassy-stm32l0/src/exti.rs
View File

@ -39,7 +39,37 @@ impl<'a> ExtiManager {
pub struct ExtiPin<T, I> {
pin: T,
interrupt: I,
mgr: &'static mut ExtiManager,
mgr: &'static ExtiManager,
}
impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> ExtiPin<T, I> {
fn wait_for_edge<'a>(
self: Pin<&'a mut Self>,
edge: TriggerEdge,
) -> impl Future<Output = ()> + 'a {
let line = self.pin.line();
let s = unsafe { self.get_unchecked_mut() };
Exti::unpend(line);
async move {
let exti: EXTI = unsafe { mem::transmute(()) };
let mut exti = Exti::new(exti);
let fut = InterruptFuture::new(&mut s.interrupt);
let port = s.pin.port();
let syscfg = &s.mgr.syscfg as *const _ as *mut SYSCFG;
cortex_m::interrupt::free(|_| {
let syscfg = unsafe { &mut *syscfg };
exti.listen_gpio(syscfg, port, line, edge);
});
fut.await;
Exti::unpend(line);
}
}
}
impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitForRisingEdge
@ -48,21 +78,7 @@ impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitF
type Future<'a> = impl Future<Output = ()> + 'a;
fn wait_for_rising_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
let s = unsafe { self.get_unchecked_mut() };
let line = s.pin.line();
Exti::unpend(line);
async move {
let exti: EXTI = unsafe { mem::transmute(()) };
let mut exti = Exti::new(exti);
let fut = InterruptFuture::new(&mut s.interrupt);
exti.listen_gpio(&mut s.mgr.syscfg, s.pin.port(), line, TriggerEdge::Rising);
fut.await;
Exti::unpend(line);
}
self.wait_for_edge(TriggerEdge::Rising)
}
}
@ -72,21 +88,7 @@ impl<T: PinWithInterrupt<Interrupt = I> + 'static, I: Interrupt + 'static> WaitF
type Future<'a> = impl Future<Output = ()> + 'a;
fn wait_for_falling_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
let s = unsafe { self.get_unchecked_mut() };
let line = s.pin.line();
Exti::unpend(line);
async move {
let exti: EXTI = unsafe { mem::transmute(()) };
let mut exti = Exti::new(exti);
let fut = InterruptFuture::new(&mut s.interrupt);
exti.listen_gpio(&mut s.mgr.syscfg, s.pin.port(), line, TriggerEdge::Falling);
fut.await;
Exti::unpend(line);
}
self.wait_for_edge(TriggerEdge::Falling)
}
}

6
embassy-stm32l0/src/lib.rs
View File

@ -4,11 +4,7 @@
#![feature(type_alias_impl_trait)]
#![allow(incomplete_features)]
#[cfg(not(any(
feature = "stm32l0x1",
feature = "stm32l0x2",
feature = "stm32l0x3",
)))]
#[cfg(not(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",)))]
compile_error!(
"No chip feature activated. You must activate exactly one of the following features: "
);