Handle SUBGHZSPI as async.
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@ -195,15 +195,20 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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}
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/// Useful for on chip peripherals like SUBGHZ which are hardwired.
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/// The bus can optionally be exposed externally with `Spi::new()` still.
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#[allow(dead_code)]
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pub fn new_subghz(
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peri: impl Peripheral<P = T> + 'd,
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txdma: impl Peripheral<P = Tx> + 'd,
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rxdma: impl Peripheral<P = Rx> + 'd,
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freq: Hertz,
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config: Config,
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pclk3_freq: u32,
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) -> Self {
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// see RM0453 rev 1 section 7.2.13 page 291
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// The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two.
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// The SUBGHZSPI_SCK clock maximum speed must not exceed 16 MHz.
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let freq = Hertz(core::cmp::min(pclk3_freq / 2, 16_000_000));
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let mut config = Config::default();
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config.mode = MODE_0;
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config.bit_order = BitOrder::MsbFirst;
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Self::new_inner(peri, None, None, None, txdma, rxdma, freq, config)
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}
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