From 3d03c18d4fd5c4f410e5e697d56b5152bb910232 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 21 Oct 2023 02:53:48 +0200 Subject: [PATCH] stm32/tests: add stm32h753zi, stm32h7a3zi. --- ci.sh | 2 ++ embassy-stm32/src/rcc/h.rs | 9 +++++++- tests/stm32/Cargo.toml | 2 ++ tests/stm32/src/bin/eth.rs | 2 ++ tests/stm32/src/bin/gpio.rs | 5 ++--- tests/stm32/src/bin/rng.rs | 8 ++++++- tests/stm32/src/common.rs | 45 +++++++++++++++++++++++++++++++++++-- 7 files changed, 66 insertions(+), 7 deletions(-) diff --git a/ci.sh b/ci.sh index ece76349..efe98c7a 100755 --- a/ci.sh +++ b/ci.sh @@ -192,6 +192,8 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/stm32g071rb \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --out-dir out/tests/stm32c031c6 \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --out-dir out/tests/stm32h755zi \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h753zi --out-dir out/tests/stm32h753zi \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7a3zi --out-dir out/tests/stm32h7a3zi \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/stm32wb55rg \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/stm32h563zi \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585ai --out-dir out/tests/stm32u585ai \ diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 5dbcfea9..8883763e 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -389,7 +389,14 @@ pub(crate) unsafe fn init(config: Config) { VoltageScale::Scale2 => (Hertz(150_000_000), Hertz(150_000_000)), VoltageScale::Scale3 => (Hertz(100_000_000), Hertz(100_000_000)), }; - #[cfg(stm32h7)] + #[cfg(pwr_h7rm0455)] + let (d1cpre_clk_max, hclk_max, pclk_max) = match config.voltage_scale { + VoltageScale::Scale0 => (Hertz(280_000_000), Hertz(280_000_000), Hertz(140_000_000)), + VoltageScale::Scale1 => (Hertz(225_000_000), Hertz(225_000_000), Hertz(112_500_000)), + VoltageScale::Scale2 => (Hertz(160_000_000), Hertz(160_000_000), Hertz(80_000_000)), + VoltageScale::Scale3 => (Hertz(88_000_000), Hertz(88_000_000), Hertz(44_000_000)), + }; + #[cfg(all(stm32h7, not(pwr_h7rm0455)))] let (d1cpre_clk_max, hclk_max, pclk_max) = match config.voltage_scale { VoltageScale::Scale0 => (Hertz(480_000_000), Hertz(240_000_000), Hertz(120_000_000)), VoltageScale::Scale1 => (Hertz(400_000_000), Hertz(200_000_000), Hertz(100_000_000)), diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index b1b2f55c..48598ec2 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -12,6 +12,8 @@ stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma", "dac-adc-pin"] stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"] stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "not-gpdma", "rng"] stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin", "rng"] +stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng"] +stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng"] stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"] stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"] diff --git a/tests/stm32/src/bin/eth.rs b/tests/stm32/src/bin/eth.rs index 6d5e05cd..75435494 100644 --- a/tests/stm32/src/bin/eth.rs +++ b/tests/stm32/src/bin/eth.rs @@ -60,6 +60,8 @@ async fn main(spawner: Spawner) { let n = 4; #[cfg(feature = "stm32f207zg")] let n = 5; + #[cfg(feature = "stm32h753zi")] + let n = 6; let mac_addr = [0x00, n, 0xDE, 0xAD, 0xBE, 0xEF]; diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs index 49d9a60f..83c96ce9 100644 --- a/tests/stm32/src/bin/gpio.rs +++ b/tests/stm32/src/bin/gpio.rs @@ -217,8 +217,7 @@ async fn main(_spawner: Spawner) { } fn delay() { - #[cfg(feature = "stm32h755zi")] - cortex_m::asm::delay(10000); - #[cfg(not(feature = "stm32h755zi"))] + #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi", feature = "stm32h7a3zi"))] + cortex_m::asm::delay(9000); cortex_m::asm::delay(1000); } diff --git a/tests/stm32/src/bin/rng.rs b/tests/stm32/src/bin/rng.rs index 65da737d..b7f36137 100644 --- a/tests/stm32/src/bin/rng.rs +++ b/tests/stm32/src/bin/rng.rs @@ -11,7 +11,12 @@ use embassy_stm32::rng::Rng; use embassy_stm32::{bind_interrupts, peripherals, rng}; use {defmt_rtt as _, panic_probe as _}; -#[cfg(any(feature = "stm32l4a6zg", feature = "stm32h755zi", feature = "stm32f429zi"))] +#[cfg(any( + feature = "stm32l4a6zg", + feature = "stm32h755zi", + feature = "stm32h753zi", + feature = "stm32f429zi" +))] bind_interrupts!(struct Irqs { HASH_RNG => rng::InterruptHandler; }); @@ -23,6 +28,7 @@ bind_interrupts!(struct Irqs { feature = "stm32l4a6zg", feature = "stm32l073rz", feature = "stm32h755zi", + feature = "stm32h753zi", feature = "stm32f429zi" )))] bind_interrupts!(struct Irqs { diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 8dde71fb..cbf9538a 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -18,6 +18,10 @@ teleprobe_meta::target!(b"nucleo-stm32f429zi"); teleprobe_meta::target!(b"nucleo-stm32wb55rg"); #[cfg(feature = "stm32h755zi")] teleprobe_meta::target!(b"nucleo-stm32h755zi"); +#[cfg(feature = "stm32h753zi")] +teleprobe_meta::target!(b"nucleo-stm32h753zi"); +#[cfg(feature = "stm32h7a3zi")] +teleprobe_meta::target!(b"nucleo-stm32h7a3zi"); #[cfg(feature = "stm32u585ai")] teleprobe_meta::target!(b"iot-stm32u585ai"); #[cfg(feature = "stm32h563zi")] @@ -105,12 +109,18 @@ define_peris!( SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler;}, ); -#[cfg(feature = "stm32h755zi")] +#[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))] define_peris!( UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32h7a3zi")] +define_peris!( + UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); #[cfg(feature = "stm32u585ai")] define_peris!( UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, @@ -289,7 +299,7 @@ pub fn config() -> Config { config.rcc.voltage_scale = VoltageScale::Scale0; } - #[cfg(feature = "stm32h755zi")] + #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))] { use embassy_stm32::rcc::*; config.rcc.hsi = Some(Hsi::Mhz64); @@ -320,6 +330,37 @@ pub fn config() -> Config { config.rcc.adc_clock_source = AdcClockSource::PLL2_P; } + #[cfg(any(feature = "stm32h7a3zi"))] + { + use embassy_stm32::rcc::*; + config.rcc.hsi = Some(Hsi::Mhz64); + config.rcc.csi = true; + config.rcc.hsi48 = true; // needed for RNG + config.rcc.pll_src = PllSource::Hsi; + config.rcc.pll1 = Some(Pll { + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL35, + divp: Some(PllDiv::DIV2), // 280 Mhz + divq: Some(PllDiv::DIV8), // SPI1 cksel defaults to pll1_q + divr: None, + }); + config.rcc.pll2 = Some(Pll { + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL35, + divp: Some(PllDiv::DIV8), // 70 Mhz + divq: None, + divr: None, + }); + config.rcc.sys = Sysclk::Pll1P; // 280 Mhz + config.rcc.ahb_pre = AHBPrescaler::DIV1; // 280 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 140 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 140 Mhz + config.rcc.apb3_pre = APBPrescaler::DIV2; // 140 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 140 Mhz + config.rcc.voltage_scale = VoltageScale::Scale0; + config.rcc.adc_clock_source = AdcClockSource::PLL2_P; + } + #[cfg(any(feature = "stm32l496zg", feature = "stm32l4a6zg", feature = "stm32l4r5zi"))] { use embassy_stm32::rcc::*;