Move EasyDMA documentation to module level
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@ -60,7 +60,9 @@ pub enum Error {
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// TODO: add other error variants.
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}
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/// Interface to the UARTE peripheral
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/// Interface to the UARTE peripheral using EasyDMA to offload the transmission and reception workload.
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///
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/// For more details about EasyDMA, consult the module documentation.
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pub struct Uarte<'d, T: Instance> {
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phantom: PhantomData<&'d mut T>,
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tx: UarteTx<'d, T>,
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@ -224,6 +226,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
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self.tx.write(buffer).await
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}
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/// Same as [`write`](Uarte::write) but will fail instead of copying data into RAM. Consult the module level documentation to learn more.
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pub async fn write_from_ram(&mut self, buffer: &[u8]) -> Result<(), Error> {
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self.tx.write_from_ram(buffer).await
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}
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@ -236,6 +239,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
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self.tx.blocking_write(buffer)
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}
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/// Same as [`blocking_write`](Uarte::blocking_write) but will fail instead of copying data into RAM. Consult the module level documentation to learn more.
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pub fn blocking_write_from_ram(&mut self, buffer: &[u8]) -> Result<(), Error> {
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self.tx.blocking_write_from_ram(buffer)
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}
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