Merge pull request #1745 from pennae/rp-dormant-sleep
rp: add generic dormant-sleep functionality
This commit is contained in:
commit
630372b183
@ -1,3 +1,4 @@
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use core::arch::asm;
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use core::marker::PhantomData;
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use core::marker::PhantomData;
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use core::sync::atomic::{AtomicU16, AtomicU32, Ordering};
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use core::sync::atomic::{AtomicU16, AtomicU32, Ordering};
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@ -6,6 +7,7 @@ use pac::clocks::vals::*;
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use crate::gpio::sealed::Pin;
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use crate::gpio::sealed::Pin;
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use crate::gpio::AnyPin;
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use crate::gpio::AnyPin;
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use crate::pac::common::{Reg, RW};
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use crate::{pac, reset, Peripheral};
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use crate::{pac, reset, Peripheral};
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// NOTE: all gpin handling is commented out for future reference.
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// NOTE: all gpin handling is commented out for future reference.
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@ -873,3 +875,131 @@ impl rand_core::RngCore for RoscRng {
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dest.fill_with(Self::next_u8)
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dest.fill_with(Self::next_u8)
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}
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}
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}
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}
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/// Enter the `DORMANT` sleep state. This will stop *all* internal clocks
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/// and can only be exited through resets, dormant-wake GPIO interrupts,
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/// and RTC interrupts. If RTC is clocked from an internal clock source
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/// it will be stopped and not function as a wakeup source.
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#[cfg(target_arch = "arm")]
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pub fn dormant_sleep() {
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struct Set<T: Copy, F: Fn()>(Reg<T, RW>, T, F);
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impl<T: Copy, F: Fn()> Drop for Set<T, F> {
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fn drop(&mut self) {
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self.0.write_value(self.1);
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self.2();
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}
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}
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fn set_with_post_restore<T: Copy, After: Fn(), F: FnOnce(&mut T) -> After>(
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reg: Reg<T, RW>,
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f: F,
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) -> Set<T, impl Fn()> {
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reg.modify(|w| {
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let old = *w;
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let after = f(w);
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Set(reg, old, after)
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})
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}
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fn set<T: Copy, F: FnOnce(&mut T)>(reg: Reg<T, RW>, f: F) -> Set<T, impl Fn()> {
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set_with_post_restore(reg, |r| {
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f(r);
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|| ()
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})
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}
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// disable all clocks that are not vital in preparation for disabling clock sources.
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// we'll keep gpout and rtc clocks untouched, gpout because we don't care about them
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// and rtc because it's a possible wakeup source. if clk_rtc is not configured for
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// gpin we'll never wake from rtc, but that's what the user asked for then.
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let _stop_adc = set(pac::CLOCKS.clk_adc_ctrl(), |w| w.set_enable(false));
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let _stop_usb = set(pac::CLOCKS.clk_usb_ctrl(), |w| w.set_enable(false));
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let _stop_peri = set(pac::CLOCKS.clk_peri_ctrl(), |w| w.set_enable(false));
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// set up rosc. we could ask the use to tell us which clock source to wake from like
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// the C SDK does, but that seems rather unfriendly. we *may* disturb rtc by changing
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// rosc configuration if it's currently the rtc clock source, so we'll configure rosc
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// to the slowest frequency to minimize that impact.
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let _configure_rosc = (
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set(pac::ROSC.ctrl(), |w| {
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w.set_enable(pac::rosc::vals::Enable::ENABLE);
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w.set_freq_range(pac::rosc::vals::FreqRange::LOW);
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}),
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// div=32
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set(pac::ROSC.div(), |w| w.set_div(pac::rosc::vals::Div(0xaa0))),
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);
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while !pac::ROSC.status().read().stable() {}
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// switch over to rosc as the system clock source. this will change clock sources for
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// watchdog and timer clocks, but timers won't be a concern and the watchdog won't
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// speed up by enough to worry about (unless it's clocked from gpin, which we don't
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// support anyway).
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let _switch_clk_ref = set(pac::CLOCKS.clk_ref_ctrl(), |w| {
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w.set_src(pac::clocks::vals::ClkRefCtrlSrc::ROSC_CLKSRC_PH);
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});
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let _switch_clk_sys = set(pac::CLOCKS.clk_sys_ctrl(), |w| {
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w.set_src(pac::clocks::vals::ClkSysCtrlSrc::CLK_REF);
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});
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// oscillator dormancy does not power down plls, we have to do that ourselves. we'll
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// restore them to their prior glory when woken though since the system may be clocked
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// from either (and usb/adc will probably need the USB PLL anyway)
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let _stop_pll_sys = set_with_post_restore(pac::PLL_SYS.pwr(), |w| {
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let wake = !w.pd() && !w.vcopd();
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w.set_pd(true);
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w.set_vcopd(true);
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move || while wake && !pac::PLL_SYS.cs().read().lock() {}
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});
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let _stop_pll_usb = set_with_post_restore(pac::PLL_USB.pwr(), |w| {
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let wake = !w.pd() && !w.vcopd();
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w.set_pd(true);
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w.set_vcopd(true);
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move || while wake && !pac::PLL_USB.cs().read().lock() {}
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});
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// dormancy only stops the oscillator we're telling to go dormant, the other remains
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// running. nothing can use xosc at this point any more. not doing this costs an 200µA.
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let _stop_xosc = set_with_post_restore(pac::XOSC.ctrl(), |w| {
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let wake = w.enable() == pac::xosc::vals::Enable::ENABLE;
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if wake {
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w.set_enable(pac::xosc::vals::Enable::DISABLE);
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}
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move || while wake && !pac::XOSC.status().read().stable() {}
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});
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let _power_down_xip_cache = set(pac::XIP_CTRL.ctrl(), |w| w.set_power_down(true));
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// only power down memory if we're running from XIP (or ROM? how?).
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// powering down memory otherwise would require a lot of exacting checks that
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// are better done by the user in a local copy of this function.
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// powering down memories saves ~100µA, so it's well worth doing.
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unsafe {
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let is_in_flash = {
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// we can't rely on the address of this function as rust sees it since linker
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// magic or even boot2 may place it into ram.
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let pc: usize;
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asm!(
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"mov {pc}, pc",
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pc = out (reg) pc
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);
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pc < 0x20000000
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};
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if is_in_flash {
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// we will be powering down memories, so we must be *absolutely*
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// certain that we're running entirely from XIP and registers until
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// memories are powered back up again. accessing memory that's powered
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// down may corrupt memory contents (see section 2.11.4 of the manual).
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// additionally a 20ns wait time is needed after powering up memories
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// again. rosc is likely to run at only a few MHz at most, so the
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// inter-instruction delay alone will be enough to satisfy this bound.
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asm!(
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"ldr {old_mem}, [{mempowerdown}]",
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"str {power_down_mems}, [{mempowerdown}]",
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"str {coma}, [{dormant}]",
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"str {old_mem}, [{mempowerdown}]",
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old_mem = out (reg) _,
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mempowerdown = in (reg) pac::SYSCFG.mempowerdown().as_ptr(),
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power_down_mems = in (reg) 0b11111111,
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dormant = in (reg) pac::ROSC.dormant().as_ptr(),
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coma = in (reg) 0x636f6d61,
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);
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} else {
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pac::ROSC.dormant().write_value(0x636f6d61);
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}
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}
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}
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