From 63a0e188eae16bdf3c40ec627bbfbdcaa1cf4978 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 15 Jul 2021 06:31:54 +0200 Subject: [PATCH] stm32/dma: fix h7 impls --- embassy-stm32/src/dma/bdma.rs | 42 ++++++++++++++++++++++++++++++- embassy-stm32/src/dma/dmamux.rs | 37 +++++++++++++++------------ examples/stm32h7/src/bin/usart.rs | 9 +++---- 3 files changed, 65 insertions(+), 23 deletions(-) diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs index 9449d4bf..37bd24d0 100644 --- a/embassy-stm32/src/dma/bdma.rs +++ b/embassy-stm32/src/dma/bdma.rs @@ -138,7 +138,6 @@ unsafe fn on_irq() { } } - /// safety: must be called only once pub(crate) unsafe fn init() { pac::interrupts! { @@ -212,6 +211,9 @@ pac::bdma_channels! { }; } +// HACK: on stm32h7 "DMA" interrupts are for DMA, not BDMA, so this +// would cause duplicate interrupt definitions. Do it manually insted +#[cfg(not(rcc_h7))] pac::interrupts! { (DMA, $irq:ident) => { #[crate::interrupt] @@ -220,3 +222,41 @@ pac::interrupts! { } }; } + +#[cfg(rcc_h7)] +mod _if_h7 { + use super::*; + + #[crate::interrupt] + unsafe fn BDMA_CHANNEL0() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL1() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL2() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL3() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL4() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL5() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL6() { + on_irq() + } + #[crate::interrupt] + unsafe fn BDMA_CHANNEL7() { + on_irq() + } +} diff --git a/embassy-stm32/src/dma/dmamux.rs b/embassy-stm32/src/dma/dmamux.rs index ca2879c2..e9fa4823 100644 --- a/embassy-stm32/src/dma/dmamux.rs +++ b/embassy-stm32/src/dma/dmamux.rs @@ -31,28 +31,33 @@ macro_rules! dma_num { (DMA2) => { 1 }; - (BDMA) => { - 0 - }; -} - -macro_rules! dmamux_peri { - (DMA1) => { - crate::pac::DMAMUX1 - }; - (DMA2) => { - crate::pac::DMAMUX1 - }; - (BDMA) => { - crate::pac::DMAMUX1 - }; } +#[cfg(not(rcc_h7))] pac::bdma_channels! { ($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => { impl MuxChannel for peripherals::$channel_peri { const DMAMUX_CH_NUM: u8 = (dma_num!($dma_peri) * 8) + $channel_num; - const DMAMUX_REGS: pac::dmamux::Dmamux = dmamux_peri!($dma_peri); + const DMAMUX_REGS: pac::dmamux::Dmamux = pac::DMAMUX1; + } + }; +} + +#[cfg(rcc_h7)] +pac::dma_channels! { + ($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => { + impl MuxChannel for peripherals::$channel_peri { + const DMAMUX_CH_NUM: u8 = (dma_num!($dma_peri) * 8) + $channel_num; + const DMAMUX_REGS: pac::dmamux::Dmamux = pac::DMAMUX1; + } + }; +} +#[cfg(rcc_h7)] +pac::bdma_channels! { + ($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => { + impl MuxChannel for peripherals::$channel_peri { + const DMAMUX_CH_NUM: u8 = $channel_num; + const DMAMUX_REGS: pac::dmamux::Dmamux = pac::DMAMUX2; } }; } diff --git a/examples/stm32h7/src/bin/usart.rs b/examples/stm32h7/src/bin/usart.rs index d8e60158..143f9449 100644 --- a/examples/stm32h7/src/bin/usart.rs +++ b/examples/stm32h7/src/bin/usart.rs @@ -1,4 +1,3 @@ - #![no_std] #![no_main] #![feature(trait_alias)] @@ -13,12 +12,12 @@ use cortex_m::prelude::_embedded_hal_blocking_serial_Write; use embassy::executor::Executor; use embassy::time::Clock; use embassy::util::Forever; +use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; -use embassy_stm32::dma_traits::NoDma; use example_common::*; -use stm32h7xx_hal as hal; use hal::prelude::*; +use stm32h7xx_hal as hal; use cortex_m_rt::entry; use stm32h7::stm32h743 as pac; @@ -60,8 +59,7 @@ fn main() -> ! { let rcc = pp.RCC.constrain(); - rcc - .sys_ck(96.mhz()) + rcc.sys_ck(96.mhz()) .pclk1(48.mhz()) .pclk2(48.mhz()) .pclk3(48.mhz()) @@ -89,7 +87,6 @@ fn main() -> ! { w }); - unsafe { embassy::time::set_clock(&ZeroClock) }; let executor = EXECUTOR.put(Executor::new());