From 66c171211822e9b680976f73f971ac27e5870934 Mon Sep 17 00:00:00 2001
From: xoviat <xoviat@users.noreply.github.com>
Date: Sun, 6 Aug 2023 11:11:53 -0500
Subject: [PATCH] stm32/rtc: enable in rcc mod

---
 embassy-stm32/src/rcc/mod.rs |  4 ++++
 embassy-stm32/src/rcc/wb.rs  | 25 +++++++++++++++++++++++++
 embassy-stm32/src/rtc/mod.rs | 15 +++++++++++++++
 3 files changed, 44 insertions(+)

diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index 5c69037e..62c19bda 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -73,6 +73,10 @@ pub struct Clocks {
 
     #[cfg(any(rcc_h5, rcc_h50, rcc_h7, rcc_h7ab))]
     pub adc: Option<Hertz>,
+
+    #[cfg(rcc_wb)]
+    /// Set only if the lsi or lse is configured
+    pub rtc: Option<Hertz>,
 }
 
 /// Frozen clock frequencies
diff --git a/embassy-stm32/src/rcc/wb.rs b/embassy-stm32/src/rcc/wb.rs
index 21aacec5..97e6aa60 100644
--- a/embassy-stm32/src/rcc/wb.rs
+++ b/embassy-stm32/src/rcc/wb.rs
@@ -1,5 +1,6 @@
 pub use super::common::{AHBPrescaler, APBPrescaler};
 use crate::rcc::Clocks;
+use crate::rtc::{enable_rtc, RtcClockSource};
 use crate::time::{khz, mhz, Hertz};
 
 /// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
@@ -110,6 +111,7 @@ pub struct Config {
     pub sys: Sysclk,
     pub mux: Option<PllMux>,
     pub pll48: Option<Pll48Source>,
+    pub rtc: Option<RtcClockSource>,
 
     pub pll: Option<Pll>,
     pub pllsai: Option<Pll>,
@@ -133,6 +135,7 @@ pub const WPAN_DEFAULT: Config = Config {
         prediv: 2,
     }),
     pll48: None,
+    rtc: None,
 
     pll: Some(Pll {
         mul: 12,
@@ -160,6 +163,7 @@ impl Default for Config {
             pll48: None,
             pll: None,
             pllsai: None,
+            rtc: None,
 
             ahb1_pre: AHBPrescaler::NotDivided,
             ahb2_pre: AHBPrescaler::NotDivided,
@@ -251,6 +255,12 @@ pub(crate) fn compute_clocks(config: &Config) -> Clocks {
         }
     };
 
+    let rtc_clk = match config.rtc {
+        Some(RtcClockSource::LSI) => Some(LSI_FREQ),
+        Some(RtcClockSource::LSE) => Some(config.lse.unwrap()),
+        _ => None,
+    };
+
     Clocks {
         sys: sys_clk,
         ahb1: ahb1_clk,
@@ -260,6 +270,7 @@ pub(crate) fn compute_clocks(config: &Config) -> Clocks {
         apb2: apb2_clk,
         apb1_tim: apb1_tim_clk,
         apb2_tim: apb2_tim_clk,
+        rtc: rtc_clk,
     }
 }
 
@@ -281,6 +292,18 @@ pub(crate) fn configure_clocks(config: &Config) {
         while !rcc.cr().read().hsirdy() {}
     }
 
+    let needs_lsi = if let Some(rtc_mux) = &config.rtc {
+        *rtc_mux == RtcClockSource::LSI
+    } else {
+        false
+    };
+
+    if needs_lsi {
+        rcc.csr().modify(|w| w.set_lsi1on(true));
+
+        while !rcc.csr().read().lsi1rdy() {}
+    }
+
     match &config.lse {
         Some(_) => {
             rcc.cfgr().modify(|w| w.set_stopwuck(true));
@@ -351,4 +374,6 @@ pub(crate) fn configure_clocks(config: &Config) {
         w.set_c2hpre(config.ahb2_pre.into());
         w.set_shdhpre(config.ahb3_pre.into());
     });
+
+    config.rtc.map(|clock_source| enable_rtc(clock_source));
 }
diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs
index 323be318..551d8043 100644
--- a/embassy-stm32/src/rtc/mod.rs
+++ b/embassy-stm32/src/rtc/mod.rs
@@ -33,6 +33,21 @@ pub struct Rtc<'d, T: Instance> {
     rtc_config: RtcConfig,
 }
 
+pub(crate) fn enable_rtc(clock_source: RtcClockSource) {
+    // TODO: rewrite the RTC module so that enable is separated from configure
+
+    assert!(clock_source == RtcClockSource::LSI || clock_source == RtcClockSource::LSE);
+
+    let _ = Rtc::new(
+        unsafe { crate::Peripherals::steal().RTC },
+        RtcConfig {
+            clock_config: clock_source,
+            async_prescaler: 1,
+            sync_prescaler: 1,
+        },
+    );
+}
+
 #[derive(Copy, Clone, Debug, PartialEq)]
 #[repr(u8)]
 pub enum RtcClockSource {