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stm32/rcc: refactor f7.

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This commit is contained in:
Dario Nieuwenhuis
2023-10-18 03:16:36 +02:00
parent 361fde35cf
commit 67010d123c
6 changed files with 358 additions and 287 deletions
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18
tests/stm32/src/common.rs
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@ -233,7 +233,23 @@ pub fn config() -> Config {
#[cfg(feature = "stm32f767zi")]
{
config.rcc.sys_ck = Some(Hertz(200_000_000));
use embassy_stm32::rcc::*;
config.rcc.hse = Some(Hse {
freq: Hertz(8_000_000),
mode: HseMode::Bypass,
});
config.rcc.pll_src = PllSource::HSE;
config.rcc.pll = Some(Pll {
prediv: PllPreDiv::DIV4,
mul: PllMul::MUL216,
divp: Some(Pllp::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz.
divq: None,
divr: None,
});
config.rcc.ahb_pre = AHBPrescaler::DIV1;
config.rcc.apb1_pre = APBPrescaler::DIV4;
config.rcc.apb2_pre = APBPrescaler::DIV2;
config.rcc.sys = Sysclk::PLL1_P;
}
#[cfg(feature = "stm32h563zi")]