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set_duty does indeed loop forever

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This commit is contained in:
Jacob Rosenthal 2021-11-02 11:56:01 -07:00
parent c939edb8d0
commit 682274870f
1 changed files with 11 additions and 15 deletions
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26
embassy-nrf/src/pwm.rs
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@ -165,18 +165,16 @@ impl<'d, T: Instance> PwmSeq<'d, T> {
} }
let r = T::regs(); let r = T::regs();
r.shorts.reset(); self.stop();
// tasks_stop doesnt exist in all svds so write its bit instead
r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
r.enable.write(|w| w.enable().enabled()); r.enable.write(|w| w.enable().enabled());
match times { match times {
// todo why doesn't this play forever? set_duty does...
// just the one time, no loop count // just the one time, no loop count
SequenceMode::Times(1) => { SequenceMode::Times(1) => {
r.loop_.write(|w| w.cnt().disabled()); r.loop_.write(|w| w.cnt().disabled());
// tasks_seqstart doesnt exist in all svds so write its bit instead // tasks_seqstart() doesn't exist in all svds so write its bit instead
r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) }); r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
} }
// loop count is how many times to play BOTH sequences // loop count is how many times to play BOTH sequences
@ -190,10 +188,10 @@ impl<'d, T: Instance> PwmSeq<'d, T> {
// we can subtract 1 by starting at seq1 instead of seq0 // we can subtract 1 by starting at seq1 instead of seq0
if odd { if odd {
// tasks_seqstart doesnt exist in all svds so write its bit instead // tasks_seqstart() doesn't exist in all svds so write its bit instead
r.tasks_seqstart[1].write(|w| unsafe { w.bits(0x01) }); r.tasks_seqstart[1].write(|w| unsafe { w.bits(0x01) });
} else { } else {
// tasks_seqstart doesnt exist in all svds so write its bit instead // tasks_seqstart() doesn't exist in all svds so write its bit instead
r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) }); r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
} }
} }
@ -201,7 +199,7 @@ impl<'d, T: Instance> PwmSeq<'d, T> {
SequenceMode::Infinite => { SequenceMode::Infinite => {
r.loop_.write(|w| unsafe { w.cnt().bits(0x1) }); r.loop_.write(|w| unsafe { w.cnt().bits(0x1) });
r.shorts.write(|w| w.loopsdone_seqstart0().enabled()); r.shorts.write(|w| w.loopsdone_seqstart0().enabled());
// tasks_seqstart doesnt exist in all svds so write its bit instead // tasks_seqstart() doesn't exist in all svds so write its bit instead
r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) }); r.tasks_seqstart[0].write(|w| unsafe { w.bits(0x01) });
} }
} }
@ -216,7 +214,7 @@ impl<'d, T: Instance> PwmSeq<'d, T> {
r.shorts.reset(); r.shorts.reset();
// tasks_stop doesnt exist in all svds so write its bit instead // tasks_stop() doesn't exist in all svds so write its bit instead
r.tasks_stop.write(|w| unsafe { w.bits(0x01) }); r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
} }
@ -361,7 +359,7 @@ impl<'d, T: Instance> Pwm<'d, T> {
r.shorts.reset(); r.shorts.reset();
// tasks_stop doesnt exist in all svds so write its bit instead // tasks_stop() doesn't exist in all svds so write its bit instead
r.tasks_stop.write(|w| unsafe { w.bits(0x01) }); r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
} }
@ -383,17 +381,15 @@ impl<'d, T: Instance> Pwm<'d, T> {
/// Sets duty cycle (15 bit) for a PWM channel. /// Sets duty cycle (15 bit) for a PWM channel.
pub fn set_duty(&self, channel: usize, duty: u16) { pub fn set_duty(&self, channel: usize, duty: u16) {
let r = T::regs();
let s = T::state(); let s = T::state();
unsafe { (*s.duty.get())[channel] = duty & 0x7FFF }; unsafe { (*s.duty.get())[channel] = duty & 0x7FFF };
// todo justify? should i fence elsehwere we task start? or // todo justify? should i fence elsehwere we task start? or
compiler_fence(Ordering::SeqCst); compiler_fence(Ordering::SeqCst);
// play duty cycle infinitely // todo why does this play forever when times(1) doesn't?
let r = T::regs(); // tasks_seqstart() doesn't exist in all svds so write its bit instead
r.loop_.write(|w| unsafe { w.cnt().bits(0x1) });
r.shorts.write(|w| w.loopsdone_seqstart0().enabled());
// tasks_seqstart doesnt exist in all svds so write its bit instead
r.tasks_seqstart[0].write(|w| unsafe { w.bits(1) }); r.tasks_seqstart[0].write(|w| unsafe { w.bits(1) });
} }