From 6929350552fcf3cc7cc830555ce09b16bb86746f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Timo=20Kr=C3=B6ger?= <timokroeger93@gmail.com>
Date: Mon, 28 Feb 2022 22:43:21 +0100
Subject: [PATCH] [can] Update macrotable comment

The chip description are corrected in:
https://github.com/embassy-rs/stm32-data/pull/123
---
 embassy-stm32/src/can/bxcan.rs | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs
index 33a729ed..cb667695 100644
--- a/embassy-stm32/src/can/bxcan.rs
+++ b/embassy-stm32/src/can/bxcan.rs
@@ -92,15 +92,13 @@ foreach_peripheral!(
             const NUM_FILTER_BANKS: u8 = 14;
         }
     };
-    // Only correct when CAN2 also exists… Fix on yaml level?
-    // There are only 14 filter banks when CAN2 is not available.
+    // CAN1 and CAN2 is a combination of master and slave instance.
+    // CAN1 owns the filter bank and needs to be enabled in order
+    // for CAN2 to receive messages.
     (can, CAN1) => {
         unsafe impl bxcan::FilterOwner for peripherals::CAN1 {
             const NUM_FILTER_BANKS: u8 = 28;
         }
-    };
-    (can, CAN2) => {
-        // CAN2 is always a slave instance where CAN1 is the master instance
         unsafe impl bxcan::MasterInstance for peripherals::CAN1 {}
     };
     (can, CAN3) => {