Move DAC, I2C, SPI and RNG to macro-tables.
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d4d914ea50
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6958091b50
@ -63,32 +63,32 @@ with open(output_file, 'w') as f:
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if (func := funcs.get(f'{name}_CK')) != None:
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f.write(f'impl_usart_pin!({name}, CkPin, {pin}, {func});')
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if block_mod == 'rng':
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for irq in chip['interrupts']:
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if re.search('RNG', irq):
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f.write(f'impl_rng!({name}, {irq});')
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# if block_mod == 'rng':
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# for irq in chip['interrupts']:
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# if re.search('RNG', irq):
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# f.write(f'impl_rng!({name}, {irq});')
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if block_mod == 'spi':
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if 'clock' in peri:
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clock = peri['clock']
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f.write(f'impl_spi!({name}, {clock});')
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for pin, funcs in af.items():
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if pin in pins:
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if (func := funcs.get(f'{name}_SCK')) != None:
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f.write(f'impl_spi_pin!({name}, SckPin, {pin}, {func});')
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if (func := funcs.get(f'{name}_MOSI')) != None:
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f.write(f'impl_spi_pin!({name}, MosiPin, {pin}, {func});')
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if (func := funcs.get(f'{name}_MISO')) != None:
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f.write(f'impl_spi_pin!({name}, MisoPin, {pin}, {func});')
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# if block_mod == 'spi':
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# if 'clock' in peri:
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# clock = peri['clock']
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# f.write(f'impl_spi!({name}, {clock});')
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# for pin, funcs in af.items():
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# if pin in pins:
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# if (func := funcs.get(f'{name}_SCK')) != None:
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# f.write(f'impl_spi_pin!({name}, SckPin, {pin}, {func});')
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# if (func := funcs.get(f'{name}_MOSI')) != None:
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# f.write(f'impl_spi_pin!({name}, MosiPin, {pin}, {func});')
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# if (func := funcs.get(f'{name}_MISO')) != None:
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# f.write(f'impl_spi_pin!({name}, MisoPin, {pin}, {func});')
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if block_mod == 'i2c':
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f.write(f'impl_i2c!({name});')
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for pin, funcs in af.items():
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if pin in pins:
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if func := funcs.get(f'{name}_SCL'):
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f.write(f'impl_i2c_pin!({name}, SclPin, {pin}, {func});')
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if func := funcs.get(f'{name}_SDA'):
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f.write(f'impl_i2c_pin!({name}, SdaPin, {pin}, {func});')
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# if block_mod == 'i2c':
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# f.write(f'impl_i2c!({name});')
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# for pin, funcs in af.items():
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# if pin in pins:
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# if func := funcs.get(f'{name}_SCL'):
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# f.write(f'impl_i2c_pin!({name}, SclPin, {pin}, {func});')
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# if func := funcs.get(f'{name}_SDA'):
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# f.write(f'impl_i2c_pin!({name}, SdaPin, {pin}, {func});')
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if block_mod == 'gpio':
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custom_singletons = True
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@ -145,15 +145,15 @@ with open(output_file, 'w') as f:
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if re.match('EXTI', irq):
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exti_interrupts.append(irq)
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if block_mod == 'dac':
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f.write(f'impl_dac!({name});')
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if 'dac_out1' in peri:
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pin = peri['dac_out1']
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f.write(f'impl_dac_pin!({name}, 1, {pin});')
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if 'dac_out2' in peri:
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pin = peri['dac_out2']
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f.write(f'impl_dac_pin!({name}, 2, {pin});')
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# if block_mod == 'dac':
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# f.write(f'impl_dac!({name});')
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# if 'dac_out1' in peri:
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# pin = peri['dac_out1']
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# f.write(f'impl_dac_pin!({name}, 1, {pin});')
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# if 'dac_out2' in peri:
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# pin = peri['dac_out2']
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# f.write(f'impl_dac_pin!({name}, 2, {pin});')
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#
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if not custom_singletons:
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singletons.append(name)
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@ -3,6 +3,7 @@
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#[cfg_attr(dac_v2, path = "v2.rs")]
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mod _version;
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use crate::gpio::NoPin;
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use crate::peripherals;
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pub use _version::*;
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pub(crate) mod sealed {
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@ -23,8 +24,8 @@ pub trait DacPin<T: Instance, const C: u8>: sealed::DacPin<T, C> + 'static {}
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impl<T: Instance, const C: u8> DacPin<T, C> for NoPin {}
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impl<T: Instance, const C: u8> sealed::DacPin<T, C> for NoPin {}
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macro_rules! impl_dac {
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($inst:ident) => {
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crate::pac::peripherals!(
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(dac, $inst:ident) => {
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impl crate::dac::sealed::Instance for peripherals::$inst {
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fn regs() -> &'static crate::pac::dac::Dac {
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&crate::pac::$inst
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@ -33,16 +34,21 @@ macro_rules! impl_dac {
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impl crate::dac::Instance for peripherals::$inst {}
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};
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);
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crate::pac::peripheral_pins!(
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($inst:ident, dac, DAC, $pin:ident, OUT1) => {
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impl DacPin<peripherals::$inst, 1> for peripherals::$pin {}
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impl sealed::DacPin<peripherals::$inst, 1> for peripherals::$pin {
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}
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macro_rules! impl_dac_pin {
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($inst:ident, $channel:expr, $pin:ident ) => {
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impl crate::dac::DacPin<peripherals::$inst, $channel> for peripherals::$pin {}
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};
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impl crate::dac::sealed::DacPin<peripherals::$inst, $channel> for peripherals::$pin {
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//fn af_num(&self) -> u8 {
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//$af
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//}
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($inst:ident, dac, DAC, $pin:ident, OUT2) => {
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impl DacPin<peripherals::$inst, 2> for peripherals::$pin {}
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impl sealed::DacPin<peripherals::$inst, 2> for peripherals::$pin {
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}
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};
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}
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);
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@ -3,6 +3,7 @@
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#[cfg_attr(i2c_v1, path = "v1.rs")]
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#[cfg_attr(i2c_v2, path = "v2.rs")]
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mod _version;
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use crate::peripherals;
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pub use _version::*;
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pub enum Error {
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@ -37,8 +38,8 @@ pub trait SclPin<T: Instance>: sealed::SclPin<T> + 'static {}
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pub trait SdaPin<T: Instance>: sealed::SdaPin<T> + 'static {}
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macro_rules! impl_i2c {
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($inst:ident) => {
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crate::pac::peripherals!(
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(i2c, $inst:ident) => {
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impl crate::i2c::sealed::Instance for peripherals::$inst {
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fn regs() -> &'static crate::pac::i2c::I2c {
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&crate::pac::$inst
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@ -46,17 +47,28 @@ macro_rules! impl_i2c {
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}
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impl crate::i2c::Instance for peripherals::$inst {}
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};
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}
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);
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macro_rules! impl_i2c_pin {
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($inst:ident, $pin_func:ident, $pin:ident, $af:expr) => {
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impl crate::i2c::$pin_func<peripherals::$inst> for peripherals::$pin {}
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crate::pac::peripheral_pins!(
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($inst:ident, i2c, I2C, $pin:ident, SDA, $af:expr) => {
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impl SdaPin<peripherals::$inst> for peripherals::$pin {}
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impl crate::i2c::sealed::$pin_func<peripherals::$inst> for peripherals::$pin {
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impl sealed::SdaPin<peripherals::$inst> for peripherals::$pin {
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fn af_num(&self) -> u8 {
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$af
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}
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}
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};
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($inst:ident, i2c, I2C, $pin:ident, SCL, $af:expr) => {
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impl SclPin<peripherals::$inst> for peripherals::$pin {}
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impl sealed::SclPin<peripherals::$inst> for peripherals::$pin {
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fn af_num(&self) -> u8 {
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$af
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}
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}
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};
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);
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@ -9,6 +9,7 @@ use futures::future::poll_fn;
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use rand_core::{CryptoRng, RngCore};
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use crate::pac;
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use crate::peripherals;
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pub(crate) static RNG_WAKER: AtomicWaker = AtomicWaker::new();
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@ -134,6 +135,58 @@ pub(crate) mod sealed {
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pub trait Instance: sealed::Instance {}
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crate::pac::peripherals!(
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(rng, $inst:ident) => {
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impl Instance for peripherals::$inst {}
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impl sealed::Instance for peripherals::$inst {
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fn regs() -> crate::pac::rng::Rng {
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crate::pac::RNG
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}
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}
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};
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);
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macro_rules! irq {
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($irq:ident) => {
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mod rng_irq {
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use crate::interrupt;
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#[interrupt]
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unsafe fn $irq() {
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let bits = $crate::pac::RNG.sr().read();
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if bits.drdy() || bits.seis() || bits.ceis() {
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$crate::pac::RNG.cr().write(|reg| reg.set_ie(false));
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$crate::rng::RNG_WAKER.wake();
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}
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}
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}
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};
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}
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crate::pac::interrupts!(
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(RNG) => {
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irq!(RNG);
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};
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(RNG_LPUART1) => {
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irq!(RNG_LPUART1);
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};
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(AES_RNG_LPUART1) => {
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irq!(AES_RNG_LPUART1);
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};
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(AES_RNG) => {
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irq!(AES_RNG);
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};
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(HASH_RNG) => {
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irq!(HASH_RNG);
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};
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);
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/*
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macro_rules! impl_rng {
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($inst:ident, $irq:ident) => {
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impl crate::rng::sealed::Instance for peripherals::RNG {
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@ -158,3 +211,5 @@ macro_rules! impl_rng {
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}
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};
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}
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*/
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@ -4,6 +4,7 @@
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#[cfg_attr(spi_v2, path = "v2.rs")]
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#[cfg_attr(spi_v3, path = "v3.rs")]
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mod _version;
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use crate::peripherals;
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pub use _version::*;
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use crate::gpio::Pin;
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@ -71,26 +72,46 @@ pub trait MosiPin<T: Instance>: sealed::MosiPin<T> + 'static {}
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pub trait MisoPin<T: Instance>: sealed::MisoPin<T> + 'static {}
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macro_rules! impl_spi {
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($inst:ident, $clk:ident) => {
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impl crate::spi::sealed::Instance for peripherals::$inst {
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crate::pac::peripherals!(
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(spi, $inst:ident) => {
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impl sealed::Instance for peripherals::$inst {
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fn regs() -> &'static crate::pac::spi::Spi {
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&crate::pac::$inst
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}
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}
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impl crate::spi::Instance for peripherals::$inst {}
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impl Instance for peripherals::$inst {}
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};
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}
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);
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macro_rules! impl_spi_pin {
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($inst:ident, $pin_func:ident, $pin:ident, $af:expr) => {
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impl crate::spi::$pin_func<peripherals::$inst> for peripherals::$pin {}
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crate::pac::peripheral_pins!(
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($inst:ident, spi, SPI, $pin:ident, SCK, $af:expr) => {
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impl SckPin<peripherals::$inst> for peripherals::$pin {}
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impl crate::spi::sealed::$pin_func<peripherals::$inst> for peripherals::$pin {
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impl sealed::SckPin<peripherals::$inst> for peripherals::$pin {
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fn af_num(&self) -> u8 {
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$af
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}
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}
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};
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($inst:ident, spi, SPI, $pin:ident, MOSI, $af:expr) => {
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impl MosiPin<peripherals::$inst> for peripherals::$pin {}
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impl sealed::MosiPin<peripherals::$inst> for peripherals::$pin {
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fn af_num(&self) -> u8 {
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$af
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}
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}
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};
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($inst:ident, spi, SPI, $pin:ident, MISO, $af:expr) => {
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impl MisoPin<peripherals::$inst> for peripherals::$pin {}
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impl sealed::MisoPin<peripherals::$inst> for peripherals::$pin {
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fn af_num(&self) -> u8 {
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$af
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}
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}
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};
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);
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@ -135,6 +135,7 @@ fn main() {
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let mut cfgs: HashSet<String> = HashSet::new();
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let mut pin_table: Vec<Vec<String>> = Vec::new();
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let mut interrupt_table: Vec<Vec<String>> = Vec::new();
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let mut peripherals_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_pins_table: Vec<Vec<String>> = Vec::new();
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let dma_base = chip
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@ -178,6 +179,10 @@ fn main() {
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cfgs.insert(bi.module.clone());
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cfgs.insert(format!("{}_{}", bi.module, bi.version));
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let mut peripheral_row = Vec::new();
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peripheral_row.push( bi.module.clone() );
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peripheral_row.push( name.clone() );
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peripherals_table.push( peripheral_row );
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if let Some(old_version) =
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peripheral_versions.insert(bi.module.clone(), bi.version.clone())
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@ -253,6 +258,7 @@ fn main() {
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make_table(&mut extra, "pins", &pin_table);
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make_table(&mut extra, "interrupts", &interrupt_table);
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make_table(&mut extra, "peripherals", &peripherals_table);
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make_table(&mut extra, "peripheral_versions", &peripheral_version_table);
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make_table(&mut extra, "peripheral_pins", &peripheral_pins_table);
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