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stm32/l4: set rtc clock source in rcc

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This commit is contained in:
xoviat 2023-08-08 19:58:03 -05:00
parent 6fc5c608f8
commit 6a73ab1afa
2 changed files with 6 additions and 4 deletions
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5
embassy-stm32/src/rcc/l4.rs
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@ -10,6 +10,7 @@ use crate::gpio::Speed;
use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw}; use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw};
use crate::pac::{FLASH, PWR, RCC}; use crate::pac::{FLASH, PWR, RCC};
use crate::rcc::{set_freqs, Clocks}; use crate::rcc::{set_freqs, Clocks};
use crate::rtc::{Rtc, RtcClockSource as RCS};
use crate::time::Hertz; use crate::time::Hertz;
use crate::{peripherals, Peripheral}; use crate::{peripherals, Peripheral};
@ -426,6 +427,8 @@ pub(crate) unsafe fn init(config: Config) {
// Wait until LSE is running // Wait until LSE is running
while !RCC.bdcr().read().lserdy() {} while !RCC.bdcr().read().lserdy() {}
Rtc::set_clock_source(RCS::LSE);
} }
RtcClockSource::LSI32 => { RtcClockSource::LSI32 => {
// Turn on the internal 32 kHz LSI oscillator // Turn on the internal 32 kHz LSI oscillator
@ -433,6 +436,8 @@ pub(crate) unsafe fn init(config: Config) {
// Wait until LSI is running // Wait until LSI is running
while !RCC.csr().read().lsirdy() {} while !RCC.csr().read().lsirdy() {}
Rtc::set_clock_source(RCS::LSI);
} }
} }

5
examples/stm32l4/src/bin/rtc.rs
View File

@ -33,10 +33,7 @@ async fn main(_spawner: Spawner) {
.and_hms_opt(10, 30, 15) .and_hms_opt(10, 30, 15)
.unwrap(); .unwrap();
let mut rtc = Rtc::new( let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
p.RTC,
RtcConfig::default().clock_source(embassy_stm32::rtc::RtcClockSource::LSE),
);
info!("Got RTC! {:?}", now.timestamp()); info!("Got RTC! {:?}", now.timestamp());
rtc.set_datetime(now.into()).expect("datetime not set"); rtc.set_datetime(now.into()).expect("datetime not set");