diff --git a/embassy-nrf/src/saadc.rs b/embassy-nrf/src/saadc.rs
index d1c82423..4592d468 100644
--- a/embassy-nrf/src/saadc.rs
+++ b/embassy-nrf/src/saadc.rs
@@ -225,7 +225,7 @@ impl<'d, const N: usize> Saadc<'d, N> {
     /// also cause the sampling to be stopped.
     pub async fn sample(&mut self, buf: &mut [i16; N]) {
         // In case the future is dropped, stop the task and wait for it to end.
-        OnDrop::new(Self::stop_sampling_immediately);
+        let on_drop = OnDrop::new(Self::stop_sampling_immediately);
 
         let r = Self::regs();
 
@@ -258,6 +258,8 @@ impl<'d, const N: usize> Saadc<'d, N> {
             Poll::Pending
         })
         .await;
+
+        drop(on_drop);
     }
 
     /// Continuous sampling with double buffers.
@@ -335,7 +337,7 @@ impl<'d, const N: usize> Saadc<'d, N> {
         S: FnMut(&[[i16; N]]) -> SamplerState,
     {
         // In case the future is dropped, stop the task and wait for it to end.
-        OnDrop::new(Self::stop_sampling_immediately);
+        let on_drop = OnDrop::new(Self::stop_sampling_immediately);
 
         let r = Self::regs();
 
@@ -382,7 +384,7 @@ impl<'d, const N: usize> Saadc<'d, N> {
         let mut current_buffer = 0;
 
         // Wait for events and complete when the sampler indicates it has had enough.
-        poll_fn(|cx| {
+        let r = poll_fn(|cx| {
             let r = Self::regs();
 
             WAKER.register(cx.waker());
@@ -419,6 +421,10 @@ impl<'d, const N: usize> Saadc<'d, N> {
             Poll::Pending
         })
         .await;
+
+        drop(on_drop);
+
+        r
     }
 
     // Stop sampling and wait for it to stop in a blocking fashion
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 4622635b..06ff07b2 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -483,7 +483,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         state.chunks_transferred.store(0, Ordering::Relaxed);
         let mut remaining_len = total_len;
 
-        let _on_drop = OnDrop::new(|| {
+        let on_drop = OnDrop::new(|| {
             let regs = T::regs();
             unsafe {
                 regs.cr1().modify(|w| {
@@ -542,6 +542,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
             self.wait_tc(&check_timeout)?;
             self.master_stop();
         }
+
+        drop(on_drop);
+
         Ok(())
     }
 
@@ -580,7 +583,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         state.chunks_transferred.store(0, Ordering::Relaxed);
         let mut remaining_len = total_len;
 
-        let _on_drop = OnDrop::new(|| {
+        let on_drop = OnDrop::new(|| {
             let regs = T::regs();
             unsafe {
                 regs.cr1().modify(|w| {
@@ -629,6 +632,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         // This should be done already
         self.wait_tc(&check_timeout)?;
         self.master_stop();
+
+        drop(on_drop);
+
         Ok(())
     }
 
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index d71aa61a..20f4eede 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -405,7 +405,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
         let r = T::regs();
 
         // make sure USART state is restored to neutral state when this future is dropped
-        let _drop = OnDrop::new(move || {
+        let on_drop = OnDrop::new(move || {
             // defmt::trace!("Clear all USART interrupts and DMA Read Request");
             // clear all interrupts and DMA Rx Request
             // SAFETY: only clears Rx related flags
@@ -563,7 +563,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
         // wait for the first of DMA request or idle line detected to completes
         // select consumes its arguments
         // when transfer is dropped, it will stop the DMA request
-        match select(transfer, idle).await {
+        let r = match select(transfer, idle).await {
             // DMA transfer completed first
             Either::First(()) => Ok(ReadCompletionEvent::DmaCompleted),
 
@@ -572,7 +572,11 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
 
             // error occurred
             Either::Second(Err(e)) => Err(e),
-        }
+        };
+
+        drop(on_drop);
+
+        r
     }
 
     async fn inner_read(&mut self, buffer: &mut [u8], enable_idle_line_detection: bool) -> Result<usize, Error>