Codegen GPIO pins

This commit is contained in:
Dario Nieuwenhuis
2021-04-23 23:47:34 +02:00
parent 29b5bae1d1
commit 6ba915a308
154 changed files with 24630 additions and 806 deletions

View File

@ -48,12 +48,35 @@ with open('Cargo.toml', 'w') as f:
# ========= Generate per-chip mod
for chip in chips.values():
print(f'generating {chip["name"]}')
peripherals = []
impls = []
pins = set()
# TODO this should probably come from the yamls?
# We don't want to hardcode the EXTI peripheral addr
peripherals.extend((f'EXTI{x}' for x in range(16)))
# TODO get the number of ports from the YAML when stm32-data includes it
for port in 'ABCD':
peripherals.extend((f'P{port}{x}' for x in range(16)))
gpio_base = chip['peripherals']['GPIOA']['address']
gpio_stride = 0x400
for (name, peri) in chip['peripherals'].items():
if name.startswith('GPIO'):
port = name[4:]
port_num = ord(port) - ord('A')
assert peri['address'] == gpio_base + gpio_stride*port_num
for pin_num in range(16):
pin = f'P{port}{pin_num}'
pins.add(pin)
peripherals.append(pin)
impls.append(
f'impl_gpio_pin!({pin}, {port_num}, {pin_num}, EXTI{pin_num});')
continue
# TODO maybe we should only autogenerate the known ones...??
peripherals.append(name)
with open(f'src/chip/{chip["name"]}.rs', 'w') as f:
# TODO uart etc
@ -63,7 +86,15 @@ for chip in chips.values():
f.write(f"""
use embassy_extras::peripherals;
peripherals!({','.join(peripherals)});
pub const GPIO_BASE: usize = 0x{gpio_base:x};
pub const GPIO_STRIDE: usize = 0x{gpio_stride:x};
""")
for i in impls:
f.write(i)
# TODO generate GPIO AF map mods
# format
os.system('rustfmt src/chip/*')