eth-v2: Get hclk frequency from clock singleton
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@ -14,7 +14,6 @@ use crate::gpio::Pin as GpioPin;
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use crate::pac::gpio::vals::Ospeedr;
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use crate::pac::gpio::vals::Ospeedr;
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use crate::pac::{ETH, RCC, SYSCFG};
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use crate::pac::{ETH, RCC, SYSCFG};
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use crate::peripherals;
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use crate::peripherals;
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use crate::time::Hertz;
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mod descriptors;
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mod descriptors;
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use super::{StationManagement, PHY};
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use super::{StationManagement, PHY};
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@ -44,7 +43,6 @@ impl<'d, P: PHY, const TX: usize, const RX: usize> Ethernet<'d, P, TX, RX> {
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tx_en: impl Unborrow<Target = impl TXEnPin> + 'd,
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tx_en: impl Unborrow<Target = impl TXEnPin> + 'd,
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phy: P,
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phy: P,
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mac_addr: [u8; 6],
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mac_addr: [u8; 6],
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hclk: Hertz,
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phy_addr: u8,
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phy_addr: u8,
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) -> Self {
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) -> Self {
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unborrow!(interrupt, ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en);
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unborrow!(interrupt, ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en);
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@ -118,8 +116,11 @@ impl<'d, P: PHY, const TX: usize, const RX: usize> Ethernet<'d, P, TX, RX> {
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});
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});
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}
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}
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// Set the MDC clock frequency in the range 1MHz - 2.5MHz
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// NOTE(unsafe) We got the peripheral singleton, which means that `rcc::init` was called
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let hclk = unsafe { crate::rcc::get_freqs().ahb1 };
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let hclk_mhz = hclk.0 / 1_000_000;
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let hclk_mhz = hclk.0 / 1_000_000;
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// Set the MDC clock frequency in the range 1MHz - 2.5MHz
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let clock_range = match hclk_mhz {
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let clock_range = match hclk_mhz {
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0..=34 => 2, // Divide by 16
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0..=34 => 2, // Divide by 16
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35..=59 => 3, // Divide by 26
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35..=59 => 3, // Divide by 26
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