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feature-gate errata workaround for h7

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JuliDi 2023-09-10 11:05:10 +02:00
parent 8c13126cff
commit 6ea5aa347d
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1 changed files with 11 additions and 8 deletions
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19
embassy-stm32/src/qspi/mod.rs
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@ -183,14 +183,17 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> {
while T::REGS.sr().read().busy() {} while T::REGS.sr().read().busy() {}
// Apply precautionary steps according to the errata... #[cfg(stm32h7)]
T::REGS.cr().write_value(Cr(0)); {
while T::REGS.sr().read().busy() {} // Apply precautionary steps according to the errata...
T::REGS.cr().write_value(Cr(0xFF000001)); T::REGS.cr().write_value(Cr(0));
T::REGS.ccr().write(|w| w.set_frcm(true)); while T::REGS.sr().read().busy() {}
T::REGS.ccr().write(|w| w.set_frcm(true)); T::REGS.cr().write_value(Cr(0xFF000001));
T::REGS.cr().write_value(Cr(0)); T::REGS.ccr().write(|w| w.set_frcm(true));
while T::REGS.sr().read().busy() {} T::REGS.ccr().write(|w| w.set_frcm(true));
T::REGS.cr().write_value(Cr(0));
while T::REGS.sr().read().busy() {}
}
T::REGS.cr().modify(|w| { T::REGS.cr().modify(|w| {
w.set_en(true); w.set_en(true);