Checkpoint my DMA for thales.
This commit is contained in:
Bob McWhirter
parent
acdf7f4f13
commit
6ec7253095
@ -6,9 +6,14 @@ use embassy::interrupt::{Interrupt, InterruptExt};
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use embassy::util::AtomicWaker;
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use futures::future::poll_fn;
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use crate::interrupt;
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use crate::pac::bdma::{regs, vals};
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use crate::pac;
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use crate::pac::dma_channels;
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use crate::pac::dma_requests;
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use crate::pac::interrupts;
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use crate::pac::peripheral_count;
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use crate::pac::peripherals;
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use crate::peripherals;
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@ -57,19 +62,91 @@ pub(crate) async unsafe fn transfer_m2p(
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src: &[u8],
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dst: *mut u8,
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) {
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defmt::info!(
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"m2p {} func {} {}-{}",
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src.len(),
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ch_func,
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ch.num(),
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ch.dma_ch_num()
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);
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let n = ch.num();
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STATE.ch_status[n].store(CH_STATUS_NONE, Ordering::Release);
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let ch_regs = ch.regs();
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let dmamux_regs = ch.dmamux_regs();
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let ch_mux_regs = dmamux_regs.ccr(ch.dmamux_ch_num() as _);
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unimplemented!()
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ch_mux_regs.write(|reg| {
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// one request?
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reg.set_nbreq(0);
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reg.set_dmareq_id(ch_func);
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});
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ch_mux_regs.modify(|reg| {
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reg.set_ege(true);
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//reg.set_se(true);
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//reg.set_soie(true);
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});
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ch_regs.par().write_value(dst as _);
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ch_regs.mar().write_value(src.as_ptr() as _);
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ch_regs.ndtr().write_value(regs::Ndtr(src.len() as _));
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ch_regs.cr().write(|reg| {
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reg.set_dir(vals::Dir::FROMMEMORY);
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reg.set_msize(vals::Size::BITS8);
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reg.set_minc(vals::Inc::ENABLED);
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reg.set_pinc(vals::Inc::DISABLED);
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reg.set_teie(true);
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reg.set_tcie(true);
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reg.set_en(true);
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});
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let res = poll_fn(|cx| {
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defmt::info!("poll");
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STATE.ch_wakers[n].register(cx.waker());
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match STATE.ch_status[n].load(Ordering::Acquire) {
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CH_STATUS_NONE => Poll::Pending,
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x => Poll::Ready(x),
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}
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})
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.await;
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defmt::info!("cr {:b}", ch_regs.cr().read().0);
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ch_regs.cr().modify(|reg| {
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reg.set_en(false);
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});
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ch_mux_regs.modify(|reg| {
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reg.set_ege(false);
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//reg.set_se(true);
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//reg.set_soie(true);
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});
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// TODO handle error
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assert!(res == CH_STATUS_COMPLETED);
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}
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pub(crate) mod sealed {
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use super::*;
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pub trait Bdma {
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fn regs() -> &'static pac::bdma::Dma;
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fn num() -> u8;
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}
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pub trait DmaMux {
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fn regs() -> &'static pac::dmamux::Dmamux;
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}
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pub trait Channel {
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fn num(&self) -> usize;
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fn regs(&self) -> pac::bdma::Ch;
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fn dma_regs() -> &'static pac::bdma::Dma;
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fn dma_ch_num(&self) -> u8;
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fn dmamux_regs(&self) -> &'static pac::dmamux::Dmamux;
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fn dmamux_ch_num(&self) -> u8;
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}
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@ -79,6 +156,7 @@ pub(crate) mod sealed {
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}
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}
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pub trait Bdma: sealed::Bdma {}
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pub trait DmaMux: sealed::DmaMux {}
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pub trait Channel: sealed::Channel {}
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pub trait PeripheralChannel<PERI, OP>: sealed::Channel {}
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@ -87,9 +165,25 @@ pub struct P2M;
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pub struct M2P;
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macro_rules! impl_dma_channel {
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($channel_peri:ident, $dmamux_peri:ident, $channel_num:expr, $dma_num:expr) => {
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($channel_peri:ident, $dmamux_peri:ident, $channel_num:expr, $dma_peri: ident, $dma_num:expr) => {
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impl Channel for peripherals::$channel_peri {}
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impl sealed::Channel for peripherals::$channel_peri {
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fn num(&self) -> usize {
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($dma_num * 8) + $channel_num
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}
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fn regs(&self) -> pac::bdma::Ch {
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Self::dma_regs().ch(self.dma_ch_num() as _)
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}
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fn dma_regs() -> &'static pac::bdma::Dma {
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&crate::pac::$dma_peri
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}
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fn dma_ch_num(&self) -> u8 {
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$channel_num
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}
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fn dmamux_regs(&self) -> &'static pac::dmamux::Dmamux {
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&crate::pac::$dmamux_peri
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}
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@ -148,18 +242,36 @@ macro_rules! impl_dmamux {
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};
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}
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macro_rules! impl_bdma {
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($peri:ident, $dma_num:expr) => {
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impl sealed::Bdma for peripherals::$peri {
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fn num() -> u8 {
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$dma_num
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}
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fn regs() -> &'static pac::bdma::Dma {
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&pac::$peri
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}
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}
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impl Bdma for peripherals::$peri {}
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};
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}
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peripherals! {
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(bdma, DMA1) => {
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impl_bdma!(DMA1, 0);
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dma_channels! {
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($channel_peri:ident, DMA1, $channel_num:expr) => {
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impl_dma_channel!($channel_peri, DMAMUX1, $channel_num, 0);
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impl_dma_channel!($channel_peri, DMAMUX1, $channel_num, DMA1, 0);
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};
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}
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};
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(bdma, DMA2) => {
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impl_bdma!(DMA2, 1);
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dma_channels! {
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($channel_peri:ident, DMA2, $channel_num:expr) => {
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impl_dma_channel!($channel_peri, DMAMUX1, $channel_num, 1);
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impl_dma_channel!($channel_peri, DMAMUX1, $channel_num, DMA2, 1);
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};
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}
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};
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@ -238,3 +350,87 @@ dma_channels! {
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impl_usart_dma_requests!($channel_peri, $dma_peri, $channel_num);
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};
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}
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unsafe fn on_irq() {
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defmt::info!("irq fire");
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peripherals! {
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//(bdma, $dma:ident) => {
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(bdma, DMA1) => {
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defmt::info!("---> dma DMA1");
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//for isrn in 0..2 {
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//let isr = pac::$dma.isr(isrn).read();
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let isr = pac::DMA1.isr().read();
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pac::DMA1.ifcr().write_value(isr);
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let dman = <peripherals::DMA1 as sealed::Bdma>::num() as usize;
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for chn in 0..8 {
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let n = dman * 8 + chn;
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defmt::info!("n={}", n);
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if isr.teif(chn) {
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defmt::info!("transfer error");
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STATE.ch_status[n].store(CH_STATUS_ERROR, Ordering::Release);
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STATE.ch_wakers[n].wake();
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} else if isr.tcif(chn) {
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defmt::info!("transfer complete");
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STATE.ch_status[n].store(CH_STATUS_COMPLETED, Ordering::Release);
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STATE.ch_wakers[n].wake();
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} else if isr.htif(chn) {
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defmt::info!("half transfer");
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} else if isr.gif(chn) {
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defmt::info!("half transfer");
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}
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}
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//}
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};
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(bdma, DMA2) => {
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defmt::info!("---> dma DMA2");
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//for isrn in 0..2 {
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//let isr = pac::$dma.isr(isrn).read();
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let isr = pac::DMA2.isr().read();
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pac::DMA2.ifcr().write_value(isr);
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let dman = <peripherals::DMA2 as sealed::Bdma>::num() as usize;
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for chn in 0..8 {
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let n = dman * 8 + chn;
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defmt::info!("n={}", n);
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if isr.teif(chn) {
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defmt::info!("transfer error");
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STATE.ch_status[n].store(CH_STATUS_ERROR, Ordering::Release);
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STATE.ch_wakers[n].wake();
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} else if isr.tcif(chn) {
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defmt::info!("transfer complete");
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STATE.ch_status[n].store(CH_STATUS_COMPLETED, Ordering::Release);
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STATE.ch_wakers[n].wake();
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} else if isr.htif(chn) {
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defmt::info!("half transfer");
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} else if isr.gif(chn) {
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defmt::info!("half transfer");
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}
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}
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//}
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};
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}
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defmt::info!("irq fire complete");
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}
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/// safety: must be called only once
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pub(crate) unsafe fn init() {
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interrupts! {
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(DMA, $irq:ident) => {
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defmt::info!("enable irq {}", stringify!($irq));
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interrupt::$irq::steal().enable();
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};
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}
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}
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interrupts! {
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(DMA, $irq:ident) => {
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#[crate::interrupt]
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unsafe fn $irq () {
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defmt::info!("irq firing {}", stringify!($irq));
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on_irq()
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}
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};
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}
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@ -92,8 +92,11 @@ pub fn init(config: Config) -> Peripherals {
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dma::init();
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#[cfg(bdma)]
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bdma::init();
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#[cfg(dmamux)]
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dmamux::init();
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#[cfg(exti)]
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exti::init();
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rcc::init(config.rcc);
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}
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