remove unnecessary mod
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e4f240823d
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@ -71,12 +71,11 @@ impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
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}
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}
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}
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}
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mod sample_time {
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/// ADC sample time
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/// ADC sample time
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///
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///
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/// The default setting is 3 ADC clock cycles.
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/// The default setting is 3 ADC clock cycles.
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#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
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pub enum SampleTime {
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pub enum SampleTime {
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Cycles3 = 0b000,
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Cycles3 = 0b000,
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Cycles15 = 0b001,
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Cycles15 = 0b001,
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Cycles28 = 0b010,
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Cycles28 = 0b010,
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@ -85,9 +84,9 @@ mod sample_time {
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Cycles112 = 0b101,
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Cycles112 = 0b101,
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Cycles144 = 0b110,
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Cycles144 = 0b110,
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Cycles480 = 0b111,
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Cycles480 = 0b111,
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}
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}
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impl SampleTime {
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impl SampleTime {
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pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::Smp {
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pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::Smp {
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match self {
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match self {
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SampleTime::Cycles3 => crate::pac::adc::vals::Smp::CYCLES3,
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SampleTime::Cycles3 => crate::pac::adc::vals::Smp::CYCLES3,
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@ -100,17 +99,14 @@ mod sample_time {
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SampleTime::Cycles480 => crate::pac::adc::vals::Smp::CYCLES480,
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SampleTime::Cycles480 => crate::pac::adc::vals::Smp::CYCLES480,
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}
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}
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}
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}
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}
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}
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impl Default for SampleTime {
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impl Default for SampleTime {
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fn default() -> Self {
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fn default() -> Self {
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Self::Cycles3
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Self::Cycles3
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}
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}
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}
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}
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}
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pub use sample_time::SampleTime;
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pub struct Adc<'d, T: Instance> {
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pub struct Adc<'d, T: Instance> {
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sample_time: SampleTime,
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sample_time: SampleTime,
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calibrated_vdda: u32,
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calibrated_vdda: u32,
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