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This commit is contained in:
Carl St-Laurent 2023-06-04 10:58:44 -04:00
parent 675499449f
commit 6fe853a7d3
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GPG Key ID: 88D67D5DC9A6996D
1 changed files with 4 additions and 3 deletions
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embassy-stm32/src/rcc/g4.rs
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@ -261,14 +261,14 @@ pub(crate) unsafe fn init(config: Config) {
ClockSrc::PLL(src, prediv, mul, div) => { ClockSrc::PLL(src, prediv, mul, div) => {
let src_freq = match src { let src_freq = match src {
PllSrc::HSI16 => { PllSrc::HSI16 => {
// Enable HSI16 // Enable HSI16 as clock source for PLL
RCC.cr().write(|w| w.set_hsion(true)); RCC.cr().write(|w| w.set_hsion(true));
while !RCC.cr().read().hsirdy() {} while !RCC.cr().read().hsirdy() {}
HSI_FREQ.0 HSI_FREQ.0
} }
PllSrc::HSE(freq) => { PllSrc::HSE(freq) => {
// Enable HSE // Enable HSE as clock source for PLL
RCC.cr().write(|w| w.set_hseon(true)); RCC.cr().write(|w| w.set_hseon(true));
while !RCC.cr().read().hserdy() {} while !RCC.cr().read().hserdy() {}
@ -276,7 +276,7 @@ pub(crate) unsafe fn init(config: Config) {
} }
}; };
// Disable PLL // Make sure PLL is disabled while we configure it
RCC.cr().modify(|w| w.set_pllon(false)); RCC.cr().modify(|w| w.set_pllon(false));
while RCC.cr().read().pllrdy() {} while RCC.cr().read().pllrdy() {}
@ -290,6 +290,7 @@ pub(crate) unsafe fn init(config: Config) {
w.set_pllsrc(src.into()); w.set_pllsrc(src.into());
}); });
// Enable PLL
RCC.cr().modify(|w| w.set_pllon(true)); RCC.cr().modify(|w| w.set_pllon(true));
while !RCC.cr().read().pllrdy() {} while !RCC.cr().read().pllrdy() {}
RCC.pllcfgr().modify(|w| w.set_pllren(true)); RCC.pllcfgr().modify(|w| w.set_pllren(true));