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I2c slave is working now. Todo: enable and test master write-read transaction

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This commit is contained in:
anton smeenk 2023-10-25 21:25:38 +02:00
parent b1afd5141c
commit 70a64e8dcb
4 changed files with 120 additions and 103 deletions
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2
embassy-stm32/src/i2c/mod.rs
View File

@ -22,8 +22,6 @@ pub enum Error {
Collission, // in case of slave mode, during sending data to master Collission, // in case of slave mode, during sending data to master
BufferEmpty, BufferEmpty,
BufferFull, BufferFull,
BufferNotEmpty,
BufferNotFilled,
BufferSize, BufferSize,
} }

45
embassy-stm32/src/i2c/v2.rs
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@ -52,19 +52,19 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
state_m.result = Some(Error::Arbitration); state_m.result = Some(Error::Arbitration);
} else if isr.nackf() { } else if isr.nackf() {
regs.icr().write(|w| w.set_nackcf(true)); regs.icr().write(|w| w.set_nackcf(true));
// Make one extra loop to wait on the stop condition
} else if isr.txis() { } else if isr.txis() {
// send the next byte to the master, or NACK in case of error, then end transaction // send the next byte to the master, or NACK in case of error, then end transaction
match state_m.read_byte() { let b = match state_m.read_byte() {
Ok(b) => regs.txdr().write(|w| w.set_txdata(b)), Ok(b) => b,
Err(e) => { Err(e) => {
state_m.result = Some(e); state_m.result = Some(e);
// Send a NACK, set nbytes to clear tcr flag
regs.cr2().modify(|w| { regs.cr2().modify(|w| {
w.set_nack(true); w.set_nack(true);
}) });
0xFF
} }
}; };
regs.txdr().write(|w| w.set_txdata(b));
} else if isr.rxne() { } else if isr.rxne() {
let b = regs.rxdr().read().rxdata(); let b = regs.rxdr().read().rxdata();
// byte is received from master. Store in buffer. In case of error send NACK, then end transaction // byte is received from master. Store in buffer. In case of error send NACK, then end transaction
@ -72,7 +72,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
Ok(()) => (), Ok(()) => (),
Err(e) => { Err(e) => {
state_m.result = Some(e); state_m.result = Some(e);
// Send a NACK, set nbytes to clear tcr flag // Send a NACK
regs.cr2().modify(|w| { regs.cr2().modify(|w| {
w.set_nack(true); w.set_nack(true);
}) })
@ -104,14 +104,27 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
// during sending nbytes automatically send a ACK, stretch clock after last byte // during sending nbytes automatically send a ACK, stretch clock after last byte
w.set_reload(vals::Reload::COMPLETED); w.set_reload(vals::Reload::COMPLETED);
}); });
// flush i2c tx register
regs.isr().write(|w| w.set_txe(true));
// fill rx data with the first byte
let b = match state_m.read_byte() {
Ok(b) => b,
Err(e) => {
state_m.result = Some(e);
0xFF
}
};
regs.txdr().write(|w| w.set_txdata(b));
} else { } else {
// Set the nbytes to the maximum buffer size and wait for the bytes from the master // Set the nbytes to the maximum buffer size and wait for the bytes from the master
regs.cr2().modify(|w| { regs.cr2().modify(|w| {
w.set_nbytes(BUFFER_SIZE as u8); w.set_nbytes(BUFFER_SIZE as u8);
w.set_reload(vals::Reload::COMPLETED) w.set_reload(vals::Reload::COMPLETED)
}); });
// flush i2c tx register // flush the rx data register
regs.isr().write(|w| w.set_txe(true)); if regs.isr().read().rxne() {
_ = regs.rxdr().read().rxdata();
}
} }
// end address phase, release clock stretching // end address phase, release clock stretching
regs.icr().write(|w| w.set_addrcf(true)); regs.icr().write(|w| w.set_addrcf(true));
@ -223,7 +236,7 @@ impl I2cStateMachine {
} else { } else {
AddressType::GenericAddress AddressType::GenericAddress
}; };
self.buffers[adress_type as usize][vals::Dir::READ as usize as usize].master_read() self.buffers[adress_type as usize][vals::Dir::READ as usize].master_read()
} }
fn write_byte(&mut self, b: u8) -> Result<(), Error> { fn write_byte(&mut self, b: u8) -> Result<(), Error> {
let adress_type = if self.address1 == self.current_address as u16 { let adress_type = if self.address1 == self.current_address as u16 {
@ -279,7 +292,6 @@ impl I2cBuffer {
self.index += 1; self.index += 1;
Ok(b) Ok(b)
} else { } else {
self.size = 0; // mark buffer empty
Err(Error::Overrun) // too many bytes asked Err(Error::Overrun) // too many bytes asked
} }
} }
@ -308,11 +320,9 @@ impl I2cBuffer {
Ok(()) Ok(())
} }
// read data from this buffer, and leave empty at the end (master write, slave read) // read data from this buffer, and leave empty at the end (master write, slave read)
// Buffer parameter must be of the size of the recieved bytes, otherwise a BufferSize error is returned
fn to_buffer(&mut self, buffer: &mut [u8]) -> Result<(), Error> { fn to_buffer(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
if self.size == 0 { if buffer.len() != self.size as usize {
return Err(Error::BufferNotFilled);
}
if buffer.len() < self.size as usize {
return Err(Error::BufferSize); return Err(Error::BufferSize);
} }
for i in 0..buffer.len() { for i in 0..buffer.len() {
@ -1038,6 +1048,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
reg.set_stopie(true); reg.set_stopie(true);
reg.set_errie(true); reg.set_errie(true);
reg.set_tcie(true); reg.set_tcie(true);
reg.set_sbc(true);
}); });
T::state().mutex.lock(|f| { T::state().mutex.lock(|f| {
let mut state_m = f.borrow_mut(); let mut state_m = f.borrow_mut();
@ -1069,6 +1080,10 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
}); });
Ok(()) Ok(())
} }
pub fn slave_sbc(&mut self, sbc_enabled: bool) {
// enable acknowlidge control
T::regs().cr1().modify(|w| w.set_sbc(sbc_enabled));
}
/// Prepare write data to master (master_read_slave_write) before transaction starts /// Prepare write data to master (master_read_slave_write) before transaction starts
/// Will return buffersize error in case the incoming buffer is too big /// Will return buffersize error in case the incoming buffer is too big
pub fn slave_write_buffer(&mut self, buffer: &[u8], address_type: AddressType) -> Result<(), super::Error> { pub fn slave_write_buffer(&mut self, buffer: &[u8], address_type: AddressType) -> Result<(), super::Error> {
@ -1079,7 +1094,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
}) })
} }
/// Read data from master (master_write_slave_read) after transaction is finished /// Read data from master (master_write_slave_read) after transaction is finished
/// Will fail if the size if the incoming buffer is smaller than the received bytes /// Will fail if the size of the incoming buffer is smaller than the received bytes
pub fn slave_read_buffer(&mut self, buffer: &mut [u8], address_type: AddressType) -> Result<(), super::Error> { pub fn slave_read_buffer(&mut self, buffer: &mut [u8], address_type: AddressType) -> Result<(), super::Error> {
T::state().mutex.lock(|f| { T::state().mutex.lock(|f| {
let mut state_m = f.borrow_mut(); let mut state_m = f.borrow_mut();

36
examples/stm32g0/src/bin/i2c_master.rs
View File

@ -2,6 +2,9 @@
#![no_main] #![no_main]
#![feature(type_alias_impl_trait)] #![feature(type_alias_impl_trait)]
// test is targeted for a specific board. Can simple be rewritten for a nucleo-070rb board
// by setting the uart to uart2 (see i2c_slave.rs)
use core::fmt::{self, Write}; use core::fmt::{self, Write};
use embassy_executor::Spawner; use embassy_executor::Spawner;
@ -76,6 +79,7 @@ async fn main(_spawner: Spawner) {
writeln!(&mut writer, "Loop counter: {:?}", counter).unwrap(); writeln!(&mut writer, "Loop counter: {:?}", counter).unwrap();
let mut buf_20 = [0_u8; 20]; let mut buf_20 = [0_u8; 20];
let mut buf_20a = [0_u8; 20];
let mut buf_64 = [0_u8; 64]; let mut buf_64 = [0_u8; 64];
let mut buf_65 = [0_u8; 65]; let mut buf_65 = [0_u8; 65];
@ -163,23 +167,23 @@ async fn main(_spawner: Spawner) {
Err(err) => writeln!(&mut writer, "Test 0x4B failed. Error: {:?}\r\n", err).unwrap(), Err(err) => writeln!(&mut writer, "Test 0x4B failed. Error: {:?}\r\n", err).unwrap(),
}; };
/* /*
match i2c.blocking_write_read(0x44, &buf_20, &mut buf_64) { match i2c.blocking_write_read(0x44, &buf_20, &mut buf_20a) {
Ok(_) => { Ok(_) => {
writeln!(&mut writer, "Test 0x44 Ok \n\r").unwrap(); writeln!(&mut writer, "Test 0x44 Ok \n\r").unwrap();
writeln!( writeln!(
&mut writer, &mut writer,
"Uppercase input should be transformed to lowercase, A -> b " "Uppercase input should be transformed to lowercase, A -> b "
) )
.unwrap(); .unwrap();
for i in 0..buf_rcv.len() { for i in 0..buf_20a.len() {
writeln!(&mut writer, "{}", buf_rcv[i]).unwrap(); writeln!(&mut writer, "{}", buf_20[i]).unwrap();
} }
writeln!(&mut writer, "\n\r").unwrap() writeln!(&mut writer, "\n\r").unwrap()
} }
Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out\n\r").unwrap(), Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out\n\r").unwrap(),
Err(err) => writeln!(&mut writer, "Test 0x44 error: {:?}", err).unwrap(), Err(err) => writeln!(&mut writer, "Test 0x44 error: {:?}", err).unwrap(),
}; };
*/ */
Timer::after(Duration::from_millis(10)).await; Timer::after(Duration::from_millis(10)).await;
// 0x4F test end and slave will present results // 0x4F test end and slave will present results

140
examples/stm32g0/src/bin/i2c_slave.rs
View File

@ -2,20 +2,24 @@
#![no_main] #![no_main]
#![feature(type_alias_impl_trait)] #![feature(type_alias_impl_trait)]
// test is targeted for nucleo-g070RB board
use core::fmt::{self, Write}; use core::fmt::{self, Write};
use embassy_executor::Spawner; use embassy_executor::Spawner;
use embassy_stm32::dma::NoDma; use embassy_stm32::dma::NoDma;
use embassy_stm32::gpio::{Level, Output, Speed};
use embassy_stm32::i2c::{Error, I2c}; use embassy_stm32::i2c::{Error, I2c};
use embassy_stm32::pac::i2c::vals; use embassy_stm32::pac::i2c::vals;
use embassy_stm32::time::Hertz; use embassy_stm32::time::Hertz;
use embassy_stm32::usart::UartTx; use embassy_stm32::usart::UartTx;
use embassy_stm32::{bind_interrupts, i2c, peripherals, usart}; use embassy_stm32::{bind_interrupts, i2c, peripherals, usart};
use embassy_time::{Duration, Timer};
use {defmt_rtt as _, panic_probe as _}; use {defmt_rtt as _, panic_probe as _};
bind_interrupts!(struct Irqs { bind_interrupts!(struct Irqs {
I2C1 => i2c::InterruptHandler<peripherals::I2C1>; I2C1 => i2c::InterruptHandler<peripherals::I2C1>;
USART1 => usart::InterruptHandler<peripherals::USART1>; USART2 => usart::InterruptHandler<peripherals::USART2>;
}); });
macro_rules! checkIsWrite { macro_rules! checkIsWrite {
@ -41,11 +45,20 @@ macro_rules! checkIsRead {
}; };
} }
#[embassy_executor::task]
pub async fn system_ticker(mut led: Output<'static, peripherals::PA5>) {
loop {
Timer::after(Duration::from_millis(200)).await;
led.set_high();
Timer::after(Duration::from_millis(100)).await;
led.set_low();
}
}
pub struct SerialWriter { pub struct SerialWriter {
tx: UartTx<'static, peripherals::USART1, peripherals::DMA1_CH1>, tx: UartTx<'static, peripherals::USART2, peripherals::DMA1_CH1>,
} }
impl SerialWriter { impl SerialWriter {
pub fn new(tx: UartTx<'static, peripherals::USART1, peripherals::DMA1_CH1>) -> Self { pub fn new(tx: UartTx<'static, peripherals::USART2, peripherals::DMA1_CH1>) -> Self {
SerialWriter { tx } SerialWriter { tx }
} }
} }
@ -57,13 +70,26 @@ impl fmt::Write for SerialWriter {
} }
#[embassy_executor::main] #[embassy_executor::main]
async fn main(_spawner: Spawner) { async fn main(spawner: Spawner) {
let p = embassy_stm32::init(Default::default()); let p = embassy_stm32::init(Default::default());
let mut led = Output::new(p.PA5, Level::High, Speed::Low);
/*
let uart = usart::Uart::new(
p.USART1,
p.PB7,
p.PB6,
Irqs,
p.DMA1_CH1,
p.DMA1_CH2,
usart::Config::default(),
)
.unwrap();
*/
let uart = usart::Uart::new( let uart = usart::Uart::new(
p.USART1, p.USART2,
p.PB7, p.PA3,
p.PB6, p.PA2,
Irqs, Irqs,
p.DMA1_CH1, p.DMA1_CH1,
p.DMA1_CH2, p.DMA1_CH2,
@ -97,6 +123,8 @@ async fn main(_spawner: Spawner) {
let mut counter = 0; let mut counter = 0;
let mut result: Option<Error> = None; let mut result: Option<Error> = None;
spawner.spawn(system_ticker(led)).unwrap();
// start of the actual test // start of the actual test
i2c.slave_start_listen().unwrap(); i2c.slave_start_listen().unwrap();
loop { loop {
@ -104,10 +132,10 @@ async fn main(_spawner: Spawner) {
writeln!(&mut writer, "Loop: {}\r", counter).unwrap(); writeln!(&mut writer, "Loop: {}\r", counter).unwrap();
for i in 0..buf_20.len() { for i in 0..buf_20.len() {
buf_20[i] = 0x61 + (i as u8) buf_20[i] = 0x20 + (i as u8)
} }
for i in 0..buf_64.len() { for i in 0..buf_64.len() {
buf_64[i] = 0x41 + (i as u8) buf_64[i] = 0x60 + (i as u8)
} }
writeln!(&mut writer, "Waiting for master activity\r").unwrap(); writeln!(&mut writer, "Waiting for master activity\r").unwrap();
@ -127,11 +155,7 @@ async fn main(_spawner: Spawner) {
match address { match address {
0x41 => { 0x41 => {
writeln!( writeln!(&mut writer, "Evaluate test 0x41.\r\n").unwrap();
&mut writer,
"Start test 0x41. Master-write-slave-read 20 bytes. Should be ok\r\n"
)
.unwrap();
checkIsWrite!(writer, dir); checkIsWrite!(writer, dir);
_ = i2c.slave_read_buffer(&mut buf_20, i2c::AddressType::GenericAddress); _ = i2c.slave_read_buffer(&mut buf_20, i2c::AddressType::GenericAddress);
match result { match result {
@ -146,16 +170,12 @@ async fn main(_spawner: Spawner) {
}; };
} }
0x42 => { 0x42 => {
writeln!( writeln!(&mut writer, "Evaluate test 0x42.\r\n").unwrap();
&mut writer,
"Start test 0x42. Master-write-slave-read 64 bytes. Should be ok\r\n"
)
.unwrap();
checkIsWrite!(writer, dir); checkIsWrite!(writer, dir);
_ = i2c.slave_read_buffer(&mut buf_64, i2c::AddressType::GenericAddress); _ = i2c.slave_read_buffer(&mut buf_64, i2c::AddressType::GenericAddress);
match result { match result {
None => { None => {
writeln!(&mut writer, "Test 0x42 passed. send 64 bytes").unwrap(); writeln!(&mut writer, "Test 0x42 passed. send 64 bytes\r\n").unwrap();
print_buffer(&mut writer, &buf_64); print_buffer(&mut writer, &buf_64);
} }
Some(err) => { Some(err) => {
@ -165,32 +185,25 @@ async fn main(_spawner: Spawner) {
}; };
} }
0x43 => { 0x43 => {
writeln!( writeln!(&mut writer, "Evaluate test 0x43.\r\n").unwrap();
&mut writer,
"Start test 0x43. Master-write-slave-read 65 bytes. Slave should NACK at 65 byte\r\n"
)
.unwrap();
checkIsWrite!(writer, dir); checkIsWrite!(writer, dir);
_ = i2c.slave_read_buffer(&mut buf_64, i2c::AddressType::GenericAddress); _ = i2c.slave_read_buffer(&mut buf_64, i2c::AddressType::GenericAddress);
match result { match result {
None => { None => {
{
writeln!(&mut writer, "Test 0x43 failed. Expected to fail Got Ok\r").unwrap()
};
}
Some(err) => {
errors += 1; errors += 1;
writeln!(&mut writer, "Test 0x43 passed. Get expected error. Error: {:?}\r", err).unwrap() writeln!(&mut writer, "Test 0x43 failed. Expected BufferFull error Got Ok\r").unwrap()
} }
Some(err) => writeln!(
&mut writer,
"Test 0x43 passed. Expected error: BufferFull. Error: {:?}\r",
err
)
.unwrap(),
}; };
} }
0x48 => { 0x48 => {
// 0x48 master read slave write slave did not yet prepare a buffer, master will fail // 0x48 master read slave write slave did not yet prepare a buffer, master will fail
writeln!( writeln!(&mut writer, "Evaluate test 0x48.\r\n").unwrap();
&mut writer,
"Start test 0x48. Master-read-slave-write 20 bytes. Should first time (buffer empty)\r\n"
)
.unwrap();
checkIsRead!(writer, dir); checkIsRead!(writer, dir);
match result { match result {
None => { None => {
@ -199,18 +212,16 @@ async fn main(_spawner: Spawner) {
} }
Some(err) => writeln!(&mut writer, "Test 0x48 passed. Got expected error: {:?}\r", err).unwrap(), Some(err) => writeln!(&mut writer, "Test 0x48 passed. Got expected error: {:?}\r", err).unwrap(),
}; };
// prepare buffer for next round // prepare buffer for test 0x49
for i in 0..buf_20.len() {
buf_20[i] = 0x61 + (i as u8)
}
_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress); _ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
} }
0x49 => { 0x49 => {
writeln!( // prepare buffer for test 0x4A
&mut writer, for i in 0..buf_20.len() {
"Start test 0x49. Master-read-slave-write 20 bytes. Should be ok\r\n" buf_20[i] = 0x50 + (i as u8)
) }
.unwrap(); _ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
writeln!(&mut writer, "Evaluate test 0x49\r\n").unwrap();
checkIsRead!(writer, dir); checkIsRead!(writer, dir);
match result { match result {
None => { None => {
@ -221,19 +232,18 @@ async fn main(_spawner: Spawner) {
writeln!(&mut writer, "Test 0x49 failed. Error: {:?}\r", err).unwrap() writeln!(&mut writer, "Test 0x49 failed. Error: {:?}\r", err).unwrap()
} }
}; };
// prepare buffer for next round // prepare buffer for test 0x4A
for i in 0..buf_20.len() {
buf_20[i] = 0x41 + (i as u8)
}
_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress); _ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
} }
0x4A => { 0x4A => {
// 0x4A master read slave write bad case: master expects 64 does slave does prepare 20 characters // 0x4A master read slave write bad case: master expects 64 does slave does prepare 20 characters
writeln!( // prepare buffer for test 0x4B
&mut writer, for i in 0..buf_64.len() {
"Start test 0x4A. Master-read-slave-write Master expects 64 bytes, slave sends 20.\r\n" buf_64[i] = 0x40 + (i as u8)
) }
.unwrap(); _ = i2c.slave_write_buffer(&buf_64, i2c::AddressType::GenericAddress);
writeln!(&mut writer, "Evaluate test 0x4A.\r\n").unwrap();
checkIsRead!(writer, dir); checkIsRead!(writer, dir);
match result { match result {
None => { None => {
@ -241,22 +251,14 @@ async fn main(_spawner: Spawner) {
} }
Some(err) => { Some(err) => {
errors += 1; errors += 1;
writeln!(&mut writer, "Test 0x4A passed. Expected errore rror: {:?}\r", err).unwrap() writeln!(&mut writer, "Test 0x4A passed. Expected error: {:?}\r", err).unwrap()
} }
} }
_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress); _ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
// prepare buffer for next round
for i in 0..buf_64.len() {
buf_64[i] = 0x41 + (i as u8)
}
_ = i2c.slave_write_buffer(&buf_64, i2c::AddressType::GenericAddress);
} }
0x4B => { 0x4B => {
writeln!( // Master-read-slave-write Master expects 64 bytes, Should be ok
&mut writer, writeln!(&mut writer, "Evaluate test 0x4B. .\r\n").unwrap();
"Start test 0x4B. Master-read-slave-write Master expects 64 bytes, Should be ok.\r\n"
)
.unwrap();
checkIsRead!(writer, dir); checkIsRead!(writer, dir);
match result { match result {
None => { None => {
@ -267,16 +269,14 @@ async fn main(_spawner: Spawner) {
writeln!(&mut writer, "Test 0x4B failed. Error: {:?}\r", err).unwrap() writeln!(&mut writer, "Test 0x4B failed. Error: {:?}\r", err).unwrap()
} }
}; };
// prepare for test 0x4F
let result: [u8; 2] = [tcount, errors]; let result: [u8; 2] = [tcount, errors];
_ = i2c.slave_write_buffer(&result, i2c::AddressType::GenericAddress); _ = i2c.slave_write_buffer(&result, i2c::AddressType::GenericAddress);
} }
0x4F => { 0x4F => {
// Master-read-slave-write 2 bytes with test summary Should be ok.
checkIsRead!(writer, dir); checkIsRead!(writer, dir);
writeln!( writeln!(&mut writer, "Evaluate test 0x4F.\r\n").unwrap();
&mut writer,
"Start test 0x4B. Master-read-slave-write 2 bytes with test summary Should be ok.\r\n"
)
.unwrap();
match result { match result {
None => { None => {
writeln!(&mut writer, "Test 0x4F Result send to master\r").unwrap(); writeln!(&mut writer, "Test 0x4F Result send to master\r").unwrap();