I2c slave is working now. Todo: enable and test master write-read transaction
This commit is contained in:
parent
b1afd5141c
commit
70a64e8dcb
@ -22,8 +22,6 @@ pub enum Error {
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Collission, // in case of slave mode, during sending data to master
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BufferEmpty,
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BufferFull,
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BufferNotEmpty,
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BufferNotFilled,
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BufferSize,
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}
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@ -52,19 +52,19 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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state_m.result = Some(Error::Arbitration);
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} else if isr.nackf() {
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regs.icr().write(|w| w.set_nackcf(true));
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// Make one extra loop to wait on the stop condition
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} else if isr.txis() {
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// send the next byte to the master, or NACK in case of error, then end transaction
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match state_m.read_byte() {
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Ok(b) => regs.txdr().write(|w| w.set_txdata(b)),
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let b = match state_m.read_byte() {
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Ok(b) => b,
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Err(e) => {
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state_m.result = Some(e);
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// Send a NACK, set nbytes to clear tcr flag
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regs.cr2().modify(|w| {
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w.set_nack(true);
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})
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});
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0xFF
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}
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};
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regs.txdr().write(|w| w.set_txdata(b));
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} else if isr.rxne() {
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let b = regs.rxdr().read().rxdata();
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// byte is received from master. Store in buffer. In case of error send NACK, then end transaction
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@ -72,7 +72,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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Ok(()) => (),
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Err(e) => {
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state_m.result = Some(e);
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// Send a NACK, set nbytes to clear tcr flag
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// Send a NACK
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regs.cr2().modify(|w| {
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w.set_nack(true);
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})
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@ -104,14 +104,27 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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// during sending nbytes automatically send a ACK, stretch clock after last byte
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w.set_reload(vals::Reload::COMPLETED);
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});
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// flush i2c tx register
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regs.isr().write(|w| w.set_txe(true));
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// fill rx data with the first byte
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let b = match state_m.read_byte() {
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Ok(b) => b,
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Err(e) => {
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state_m.result = Some(e);
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0xFF
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}
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};
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regs.txdr().write(|w| w.set_txdata(b));
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} else {
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// Set the nbytes to the maximum buffer size and wait for the bytes from the master
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regs.cr2().modify(|w| {
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w.set_nbytes(BUFFER_SIZE as u8);
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w.set_reload(vals::Reload::COMPLETED)
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});
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// flush i2c tx register
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regs.isr().write(|w| w.set_txe(true));
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// flush the rx data register
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if regs.isr().read().rxne() {
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_ = regs.rxdr().read().rxdata();
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}
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}
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// end address phase, release clock stretching
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regs.icr().write(|w| w.set_addrcf(true));
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@ -223,7 +236,7 @@ impl I2cStateMachine {
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} else {
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AddressType::GenericAddress
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};
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self.buffers[adress_type as usize][vals::Dir::READ as usize as usize].master_read()
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self.buffers[adress_type as usize][vals::Dir::READ as usize].master_read()
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}
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fn write_byte(&mut self, b: u8) -> Result<(), Error> {
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let adress_type = if self.address1 == self.current_address as u16 {
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@ -279,7 +292,6 @@ impl I2cBuffer {
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self.index += 1;
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Ok(b)
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} else {
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self.size = 0; // mark buffer empty
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Err(Error::Overrun) // too many bytes asked
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}
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}
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@ -308,11 +320,9 @@ impl I2cBuffer {
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Ok(())
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}
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// read data from this buffer, and leave empty at the end (master write, slave read)
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// Buffer parameter must be of the size of the recieved bytes, otherwise a BufferSize error is returned
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fn to_buffer(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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if self.size == 0 {
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return Err(Error::BufferNotFilled);
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}
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if buffer.len() < self.size as usize {
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if buffer.len() != self.size as usize {
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return Err(Error::BufferSize);
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}
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for i in 0..buffer.len() {
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@ -1038,6 +1048,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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reg.set_stopie(true);
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reg.set_errie(true);
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reg.set_tcie(true);
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reg.set_sbc(true);
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});
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T::state().mutex.lock(|f| {
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let mut state_m = f.borrow_mut();
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@ -1069,6 +1080,10 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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});
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Ok(())
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}
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pub fn slave_sbc(&mut self, sbc_enabled: bool) {
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// enable acknowlidge control
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T::regs().cr1().modify(|w| w.set_sbc(sbc_enabled));
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}
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/// Prepare write data to master (master_read_slave_write) before transaction starts
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/// Will return buffersize error in case the incoming buffer is too big
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pub fn slave_write_buffer(&mut self, buffer: &[u8], address_type: AddressType) -> Result<(), super::Error> {
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@ -1079,7 +1094,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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})
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}
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/// Read data from master (master_write_slave_read) after transaction is finished
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/// Will fail if the size if the incoming buffer is smaller than the received bytes
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/// Will fail if the size of the incoming buffer is smaller than the received bytes
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pub fn slave_read_buffer(&mut self, buffer: &mut [u8], address_type: AddressType) -> Result<(), super::Error> {
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T::state().mutex.lock(|f| {
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let mut state_m = f.borrow_mut();
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@ -2,6 +2,9 @@
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#![no_main]
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#![feature(type_alias_impl_trait)]
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// test is targeted for a specific board. Can simple be rewritten for a nucleo-070rb board
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// by setting the uart to uart2 (see i2c_slave.rs)
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use core::fmt::{self, Write};
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use embassy_executor::Spawner;
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@ -76,6 +79,7 @@ async fn main(_spawner: Spawner) {
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writeln!(&mut writer, "Loop counter: {:?}", counter).unwrap();
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let mut buf_20 = [0_u8; 20];
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let mut buf_20a = [0_u8; 20];
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let mut buf_64 = [0_u8; 64];
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let mut buf_65 = [0_u8; 65];
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@ -163,23 +167,23 @@ async fn main(_spawner: Spawner) {
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Err(err) => writeln!(&mut writer, "Test 0x4B failed. Error: {:?}\r\n", err).unwrap(),
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};
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/*
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match i2c.blocking_write_read(0x44, &buf_20, &mut buf_64) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x44 Ok \n\r").unwrap();
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writeln!(
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&mut writer,
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"Uppercase input should be transformed to lowercase, A -> b "
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)
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.unwrap();
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match i2c.blocking_write_read(0x44, &buf_20, &mut buf_20a) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x44 Ok \n\r").unwrap();
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writeln!(
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&mut writer,
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"Uppercase input should be transformed to lowercase, A -> b "
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)
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.unwrap();
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for i in 0..buf_rcv.len() {
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writeln!(&mut writer, "{}", buf_rcv[i]).unwrap();
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}
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writeln!(&mut writer, "\n\r").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out\n\r").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x44 error: {:?}", err).unwrap(),
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};
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for i in 0..buf_20a.len() {
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writeln!(&mut writer, "{}", buf_20[i]).unwrap();
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}
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writeln!(&mut writer, "\n\r").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out\n\r").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x44 error: {:?}", err).unwrap(),
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};
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*/
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Timer::after(Duration::from_millis(10)).await;
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// 0x4F test end and slave will present results
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@ -2,20 +2,24 @@
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#![no_main]
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#![feature(type_alias_impl_trait)]
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// test is targeted for nucleo-g070RB board
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use core::fmt::{self, Write};
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use embassy_executor::Spawner;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::gpio::{Level, Output, Speed};
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use embassy_stm32::i2c::{Error, I2c};
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use embassy_stm32::pac::i2c::vals;
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use embassy_stm32::time::Hertz;
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use embassy_stm32::usart::UartTx;
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use embassy_stm32::{bind_interrupts, i2c, peripherals, usart};
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use embassy_time::{Duration, Timer};
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use {defmt_rtt as _, panic_probe as _};
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bind_interrupts!(struct Irqs {
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I2C1 => i2c::InterruptHandler<peripherals::I2C1>;
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USART1 => usart::InterruptHandler<peripherals::USART1>;
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USART2 => usart::InterruptHandler<peripherals::USART2>;
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});
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macro_rules! checkIsWrite {
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@ -41,11 +45,20 @@ macro_rules! checkIsRead {
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};
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}
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#[embassy_executor::task]
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pub async fn system_ticker(mut led: Output<'static, peripherals::PA5>) {
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loop {
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Timer::after(Duration::from_millis(200)).await;
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led.set_high();
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Timer::after(Duration::from_millis(100)).await;
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led.set_low();
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}
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}
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pub struct SerialWriter {
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tx: UartTx<'static, peripherals::USART1, peripherals::DMA1_CH1>,
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tx: UartTx<'static, peripherals::USART2, peripherals::DMA1_CH1>,
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}
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impl SerialWriter {
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pub fn new(tx: UartTx<'static, peripherals::USART1, peripherals::DMA1_CH1>) -> Self {
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pub fn new(tx: UartTx<'static, peripherals::USART2, peripherals::DMA1_CH1>) -> Self {
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SerialWriter { tx }
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}
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}
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@ -57,13 +70,26 @@ impl fmt::Write for SerialWriter {
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}
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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async fn main(spawner: Spawner) {
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let p = embassy_stm32::init(Default::default());
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let mut led = Output::new(p.PA5, Level::High, Speed::Low);
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/*
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let uart = usart::Uart::new(
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p.USART1,
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p.PB7,
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p.PB6,
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Irqs,
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p.DMA1_CH1,
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p.DMA1_CH2,
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usart::Config::default(),
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)
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.unwrap();
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*/
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let uart = usart::Uart::new(
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p.USART1,
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p.PB7,
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p.PB6,
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p.USART2,
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p.PA3,
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p.PA2,
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Irqs,
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p.DMA1_CH1,
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p.DMA1_CH2,
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@ -97,6 +123,8 @@ async fn main(_spawner: Spawner) {
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let mut counter = 0;
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let mut result: Option<Error> = None;
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spawner.spawn(system_ticker(led)).unwrap();
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// start of the actual test
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i2c.slave_start_listen().unwrap();
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loop {
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@ -104,10 +132,10 @@ async fn main(_spawner: Spawner) {
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writeln!(&mut writer, "Loop: {}\r", counter).unwrap();
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for i in 0..buf_20.len() {
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buf_20[i] = 0x61 + (i as u8)
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buf_20[i] = 0x20 + (i as u8)
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}
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for i in 0..buf_64.len() {
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buf_64[i] = 0x41 + (i as u8)
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buf_64[i] = 0x60 + (i as u8)
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}
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writeln!(&mut writer, "Waiting for master activity\r").unwrap();
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@ -127,11 +155,7 @@ async fn main(_spawner: Spawner) {
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match address {
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0x41 => {
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writeln!(
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&mut writer,
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"Start test 0x41. Master-write-slave-read 20 bytes. Should be ok\r\n"
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)
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.unwrap();
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writeln!(&mut writer, "Evaluate test 0x41.\r\n").unwrap();
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checkIsWrite!(writer, dir);
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_ = i2c.slave_read_buffer(&mut buf_20, i2c::AddressType::GenericAddress);
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match result {
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@ -146,16 +170,12 @@ async fn main(_spawner: Spawner) {
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};
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}
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0x42 => {
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writeln!(
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&mut writer,
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"Start test 0x42. Master-write-slave-read 64 bytes. Should be ok\r\n"
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)
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.unwrap();
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writeln!(&mut writer, "Evaluate test 0x42.\r\n").unwrap();
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checkIsWrite!(writer, dir);
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_ = i2c.slave_read_buffer(&mut buf_64, i2c::AddressType::GenericAddress);
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match result {
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None => {
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writeln!(&mut writer, "Test 0x42 passed. send 64 bytes").unwrap();
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writeln!(&mut writer, "Test 0x42 passed. send 64 bytes\r\n").unwrap();
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print_buffer(&mut writer, &buf_64);
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}
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Some(err) => {
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@ -165,32 +185,25 @@ async fn main(_spawner: Spawner) {
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};
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}
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0x43 => {
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writeln!(
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&mut writer,
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"Start test 0x43. Master-write-slave-read 65 bytes. Slave should NACK at 65 byte\r\n"
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)
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.unwrap();
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writeln!(&mut writer, "Evaluate test 0x43.\r\n").unwrap();
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checkIsWrite!(writer, dir);
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_ = i2c.slave_read_buffer(&mut buf_64, i2c::AddressType::GenericAddress);
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match result {
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None => {
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{
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writeln!(&mut writer, "Test 0x43 failed. Expected to fail Got Ok\r").unwrap()
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};
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}
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Some(err) => {
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errors += 1;
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writeln!(&mut writer, "Test 0x43 passed. Get expected error. Error: {:?}\r", err).unwrap()
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writeln!(&mut writer, "Test 0x43 failed. Expected BufferFull error Got Ok\r").unwrap()
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}
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Some(err) => writeln!(
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&mut writer,
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"Test 0x43 passed. Expected error: BufferFull. Error: {:?}\r",
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err
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)
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.unwrap(),
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};
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}
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0x48 => {
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// 0x48 master read slave write slave did not yet prepare a buffer, master will fail
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writeln!(
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&mut writer,
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"Start test 0x48. Master-read-slave-write 20 bytes. Should first time (buffer empty)\r\n"
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)
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.unwrap();
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writeln!(&mut writer, "Evaluate test 0x48.\r\n").unwrap();
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checkIsRead!(writer, dir);
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match result {
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None => {
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@ -199,18 +212,16 @@ async fn main(_spawner: Spawner) {
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}
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Some(err) => writeln!(&mut writer, "Test 0x48 passed. Got expected error: {:?}\r", err).unwrap(),
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};
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// prepare buffer for next round
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for i in 0..buf_20.len() {
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buf_20[i] = 0x61 + (i as u8)
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}
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// prepare buffer for test 0x49
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_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
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}
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0x49 => {
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writeln!(
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&mut writer,
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"Start test 0x49. Master-read-slave-write 20 bytes. Should be ok\r\n"
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)
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.unwrap();
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// prepare buffer for test 0x4A
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for i in 0..buf_20.len() {
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buf_20[i] = 0x50 + (i as u8)
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}
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_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
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writeln!(&mut writer, "Evaluate test 0x49\r\n").unwrap();
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checkIsRead!(writer, dir);
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match result {
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None => {
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@ -221,19 +232,18 @@ async fn main(_spawner: Spawner) {
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writeln!(&mut writer, "Test 0x49 failed. Error: {:?}\r", err).unwrap()
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}
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};
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// prepare buffer for next round
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for i in 0..buf_20.len() {
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buf_20[i] = 0x41 + (i as u8)
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}
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// prepare buffer for test 0x4A
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_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
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}
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0x4A => {
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// 0x4A master read slave write bad case: master expects 64 does slave does prepare 20 characters
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writeln!(
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&mut writer,
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"Start test 0x4A. Master-read-slave-write Master expects 64 bytes, slave sends 20.\r\n"
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)
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.unwrap();
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// prepare buffer for test 0x4B
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for i in 0..buf_64.len() {
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buf_64[i] = 0x40 + (i as u8)
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}
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_ = i2c.slave_write_buffer(&buf_64, i2c::AddressType::GenericAddress);
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writeln!(&mut writer, "Evaluate test 0x4A.\r\n").unwrap();
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checkIsRead!(writer, dir);
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match result {
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None => {
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@ -241,22 +251,14 @@ async fn main(_spawner: Spawner) {
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}
|
||||
Some(err) => {
|
||||
errors += 1;
|
||||
writeln!(&mut writer, "Test 0x4A passed. Expected errore rror: {:?}\r", err).unwrap()
|
||||
writeln!(&mut writer, "Test 0x4A passed. Expected error: {:?}\r", err).unwrap()
|
||||
}
|
||||
}
|
||||
_ = i2c.slave_write_buffer(&buf_20, i2c::AddressType::GenericAddress);
|
||||
// prepare buffer for next round
|
||||
for i in 0..buf_64.len() {
|
||||
buf_64[i] = 0x41 + (i as u8)
|
||||
}
|
||||
_ = i2c.slave_write_buffer(&buf_64, i2c::AddressType::GenericAddress);
|
||||
}
|
||||
0x4B => {
|
||||
writeln!(
|
||||
&mut writer,
|
||||
"Start test 0x4B. Master-read-slave-write Master expects 64 bytes, Should be ok.\r\n"
|
||||
)
|
||||
.unwrap();
|
||||
// Master-read-slave-write Master expects 64 bytes, Should be ok
|
||||
writeln!(&mut writer, "Evaluate test 0x4B. .\r\n").unwrap();
|
||||
checkIsRead!(writer, dir);
|
||||
match result {
|
||||
None => {
|
||||
@ -267,16 +269,14 @@ async fn main(_spawner: Spawner) {
|
||||
writeln!(&mut writer, "Test 0x4B failed. Error: {:?}\r", err).unwrap()
|
||||
}
|
||||
};
|
||||
// prepare for test 0x4F
|
||||
let result: [u8; 2] = [tcount, errors];
|
||||
_ = i2c.slave_write_buffer(&result, i2c::AddressType::GenericAddress);
|
||||
}
|
||||
0x4F => {
|
||||
// Master-read-slave-write 2 bytes with test summary Should be ok.
|
||||
checkIsRead!(writer, dir);
|
||||
writeln!(
|
||||
&mut writer,
|
||||
"Start test 0x4B. Master-read-slave-write 2 bytes with test summary Should be ok.\r\n"
|
||||
)
|
||||
.unwrap();
|
||||
writeln!(&mut writer, "Evaluate test 0x4F.\r\n").unwrap();
|
||||
match result {
|
||||
None => {
|
||||
writeln!(&mut writer, "Test 0x4F Result send to master\r").unwrap();
|
||||
|
Loading…
Reference in New Issue
Block a user