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stm32/rtc: misc fixes

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This commit is contained in:
xoviat 2023-08-21 18:00:49 -05:00
parent 8c12453544
commit 7148397771
1 changed files with 11 additions and 2 deletions
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13
embassy-stm32/src/rtc/v2.rs
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@ -18,9 +18,15 @@ impl RtcInstant {
use crate::rtc::bcd2_to_byte; use crate::rtc::bcd2_to_byte;
let tr = RTC::regs().tr().read(); let tr = RTC::regs().tr().read();
let tr2 = RTC::regs().tr().read();
let ssr = RTC::regs().ssr().read().ss(); let ssr = RTC::regs().ssr().read().ss();
let ssr2 = RTC::regs().ssr().read().ss();
let st = bcd2_to_byte((tr.st(), tr.su())); let st = bcd2_to_byte((tr.st(), tr.su()));
let st2 = bcd2_to_byte((tr2.st(), tr2.su()));
assert!(st == st2);
assert!(ssr == ssr2);
let _ = RTC::regs().dr().read(); let _ = RTC::regs().dr().read();
@ -41,12 +47,15 @@ impl core::ops::Sub for RtcInstant {
trace!("self st: {}", self.st); trace!("self st: {}", self.st);
trace!("other st: {}", rhs.st); trace!("other st: {}", rhs.st);
trace!("self ssr: {}", self.ssr);
trace!("other ssr: {}", rhs.ssr);
let st = if self.st < rhs.st { self.st + 60 } else { self.st }; let st = if self.st < rhs.st { self.st + 60 } else { self.st };
trace!("self st: {}", st); trace!("self st: {}", st);
let self_ticks = (st as u32 * 256 + self.ssr as u32); let self_ticks = st as u32 * 256 + self.ssr as u32;
let other_ticks = (rhs.st as u32 * 256 + rhs.ssr as u32); let other_ticks = rhs.st as u32 * 256 + rhs.ssr as u32;
let rtc_ticks = self_ticks - other_ticks; let rtc_ticks = self_ticks - other_ticks;
trace!("self ticks: {}", self_ticks); trace!("self ticks: {}", self_ticks);