Merge branch 'main' of https://github.com/embassy-rs/embassy into adc-g4

This commit is contained in:
xoviat
2023-09-05 17:02:28 -05:00
8 changed files with 330 additions and 28 deletions

126
embassy-stm32/src/adc/f3.rs Normal file
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@ -0,0 +1,126 @@
use embassy_hal_internal::into_ref;
use embedded_hal_02::blocking::delay::DelayUs;
use crate::adc::{Adc, AdcPin, Instance, SampleTime};
use crate::time::Hertz;
use crate::Peripheral;
pub const VDDA_CALIB_MV: u32 = 3300;
pub const ADC_MAX: u32 = (1 << 12) - 1;
// No calibration data for F103, voltage should be 1.2v
pub const VREF_INT: u32 = 1200;
pub struct Vref;
impl<T: Instance> AdcPin<T> for Vref {}
impl<T: Instance> super::sealed::AdcPin<T> for Vref {
fn channel(&self) -> u8 {
18
}
}
pub struct Temperature;
impl<T: Instance> AdcPin<T> for Temperature {}
impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
fn channel(&self) -> u8 {
16
}
}
impl<'d, T: Instance> Adc<'d, T> {
pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
use crate::pac::adc::vals;
into_ref!(adc);
T::enable();
T::reset();
// Enable the adc regulator
T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::INTERMEDIATE));
T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::ENABLED));
// Wait for the regulator to stabilize
delay.delay_us(10);
assert!(!T::regs().cr().read().aden());
// Begin calibration
T::regs().cr().modify(|w| w.set_adcaldif(false));
T::regs().cr().modify(|w| w.set_adcal(true));
while T::regs().cr().read().adcal() {}
// Enable the adc
T::regs().cr().modify(|w| w.set_aden(true));
// Wait until the adc is ready
while !T::regs().isr().read().adrdy() {}
Self {
adc,
sample_time: Default::default(),
}
}
fn freq() -> Hertz {
<T as crate::adc::sealed::Instance>::frequency()
}
pub fn sample_time_for_us(&self, us: u32) -> SampleTime {
match us * Self::freq().0 / 1_000_000 {
0..=1 => SampleTime::Cycles1_5,
2..=4 => SampleTime::Cycles4_5,
5..=7 => SampleTime::Cycles7_5,
8..=19 => SampleTime::Cycles19_5,
20..=61 => SampleTime::Cycles61_5,
62..=181 => SampleTime::Cycles181_5,
_ => SampleTime::Cycles601_5,
}
}
pub fn enable_vref(&self, _delay: &mut impl DelayUs<u32>) -> Vref {
T::common_regs().ccr().modify(|w| w.set_vrefen(true));
Vref {}
}
pub fn enable_temperature(&self) -> Temperature {
T::common_regs().ccr().modify(|w| w.set_tsen(true));
Temperature {}
}
pub fn set_sample_time(&mut self, sample_time: SampleTime) {
self.sample_time = sample_time;
}
/// Perform a single conversion.
fn convert(&mut self) -> u16 {
T::regs().isr().write(|_| {});
T::regs().cr().modify(|w| w.set_adstart(true));
while !T::regs().isr().read().eoc() && !T::regs().isr().read().eos() {}
T::regs().isr().write(|_| {});
T::regs().dr().read().0 as u16
}
pub fn read(&mut self, pin: &mut impl AdcPin<T>) -> u16 {
// pin.set_as_analog();
Self::set_channel_sample_time(pin.channel(), self.sample_time);
// Configure the channel to sample
T::regs().sqr3().write(|w| w.set_sq(0, pin.channel()));
self.convert()
}
fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
let sample_time = sample_time.into();
if ch <= 9 {
T::regs().smpr2().modify(|reg| reg.set_smp(ch as _, sample_time));
} else {
T::regs().smpr1().modify(|reg| reg.set_smp((ch - 10) as _, sample_time));
}
}
}

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@ -1,23 +1,24 @@
#![macro_use]
#[cfg(not(any(adc_f3, adc_f3_v2)))]
#[cfg(not(adc_f3_v2))]
#[cfg_attr(adc_f1, path = "f1.rs")]
#[cfg_attr(adc_f3, path = "f3.rs")]
#[cfg_attr(adc_v1, path = "v1.rs")]
#[cfg_attr(adc_v2, path = "v2.rs")]
#[cfg_attr(any(adc_v3, adc_g0), path = "v3.rs")]
#[cfg_attr(adc_v4, path = "v4.rs")]
mod _version;
#[cfg(not(any(adc_f1, adc_f3, adc_f3_v2)))]
#[cfg(not(any(adc_f1, adc_f3_v2)))]
mod resolution;
mod sample_time;
#[cfg(not(any(adc_f3, adc_f3_v2)))]
#[allow(unused)]
#[cfg(not(adc_f3_v2))]
pub use _version::*;
#[cfg(not(any(adc_f1, adc_f3, adc_f3_v2)))]
pub use resolution::Resolution;
#[cfg(not(any(adc_f3, adc_f3_v2)))]
#[cfg(not(adc_f3_v2))]
pub use sample_time::SampleTime;
use crate::peripherals;
@ -25,15 +26,17 @@ use crate::peripherals;
pub struct Adc<'d, T: Instance> {
#[allow(unused)]
adc: crate::PeripheralRef<'d, T>,
#[cfg(not(any(adc_f3, adc_f3_v2)))]
#[cfg(not(adc_f3_v2))]
sample_time: SampleTime,
}
pub(crate) mod sealed {
pub trait Instance {
fn regs() -> crate::pac::adc::Adc;
#[cfg(not(any(adc_f1, adc_v1, adc_f3, adc_f3_v2)))]
#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2)))]
fn common_regs() -> crate::pac::adccommon::AdcCommon;
#[cfg(adc_f3)]
fn frequency() -> crate::time::Hertz;
}
pub trait AdcPin<T: Instance> {
@ -45,22 +48,22 @@ pub(crate) mod sealed {
}
}
#[cfg(not(any(adc_f1, adc_v1, adc_v2, adc_v4)))]
#[cfg(not(any(adc_f1, adc_v1, adc_v2, adc_v4, adc_f3)))]
pub trait Instance: sealed::Instance + crate::Peripheral<P = Self> {}
#[cfg(any(adc_f1, adc_v1, adc_v2, adc_v4))]
#[cfg(any(adc_f1, adc_v1, adc_v2, adc_v4, adc_f3))]
pub trait Instance: sealed::Instance + crate::Peripheral<P = Self> + crate::rcc::RccPeripheral {}
pub trait AdcPin<T: Instance>: sealed::AdcPin<T> {}
pub trait InternalChannel<T>: sealed::InternalChannel<T> {}
#[cfg(not(stm32h7))]
#[cfg(not(any(stm32h7, adc_f3)))]
foreach_peripheral!(
(adc, $inst:ident) => {
impl crate::adc::sealed::Instance for peripherals::$inst {
fn regs() -> crate::pac::adc::Adc {
crate::pac::$inst
}
#[cfg(not(any(adc_f1, adc_v1, adc_f3, adc_f3_v2)))]
#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2)))]
fn common_regs() -> crate::pac::adccommon::AdcCommon {
foreach_peripheral!{
(adccommon, $common_inst:ident) => {
@ -74,7 +77,7 @@ foreach_peripheral!(
};
);
#[cfg(stm32h7)]
#[cfg(any(stm32h7, adc_f3))]
foreach_peripheral!(
(adc, ADC3) => {
impl crate::adc::sealed::Instance for peripherals::ADC3 {
@ -89,16 +92,43 @@ foreach_peripheral!(
};
}
}
#[cfg(adc_f3)]
fn frequency() -> crate::time::Hertz {
unsafe { crate::rcc::get_freqs() }.adc34.unwrap()
}
}
impl crate::adc::Instance for peripherals::ADC3 {}
};
(adc, ADC4) => {
impl crate::adc::sealed::Instance for peripherals::ADC4 {
fn regs() -> crate::pac::adc::Adc {
crate::pac::ADC4
}
#[cfg(not(any(adc_f1, adc_v1)))]
fn common_regs() -> crate::pac::adccommon::AdcCommon {
foreach_peripheral!{
(adccommon, ADC3_COMMON) => {
return crate::pac::ADC3_COMMON
};
}
}
#[cfg(adc_f3)]
fn frequency() -> crate::time::Hertz {
unsafe { crate::rcc::get_freqs() }.adc34.unwrap()
}
}
impl crate::adc::Instance for peripherals::ADC4 {}
};
(adc, $inst:ident) => {
impl crate::adc::sealed::Instance for peripherals::$inst {
fn regs() -> crate::pac::adc::Adc {
crate::pac::$inst
}
#[cfg(all(not(adc_f1), not(adc_v1)))]
#[cfg(not(any(adc_f1, adc_v1)))]
fn common_regs() -> crate::pac::adccommon::AdcCommon {
foreach_peripheral!{
(adccommon, ADC_COMMON) => {
@ -106,6 +136,11 @@ foreach_peripheral!(
};
}
}
#[cfg(adc_f3)]
fn frequency() -> crate::time::Hertz {
unsafe { crate::rcc::get_freqs() }.adc.unwrap()
}
}
impl crate::adc::Instance for peripherals::$inst {}

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@ -1,4 +1,4 @@
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0))]
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0, adc_f3))]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum Resolution {
TwelveBit,
@ -19,7 +19,7 @@ pub enum Resolution {
impl Default for Resolution {
fn default() -> Self {
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0))]
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0, adc_f3))]
{
Self::TwelveBit
}
@ -40,7 +40,7 @@ impl From<Resolution> for crate::pac::adc::vals::Res {
Resolution::TwelveBit => crate::pac::adc::vals::Res::TWELVEBIT,
Resolution::TenBit => crate::pac::adc::vals::Res::TENBIT,
Resolution::EightBit => crate::pac::adc::vals::Res::EIGHTBIT,
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0))]
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0, adc_f3))]
Resolution::SixBit => crate::pac::adc::vals::Res::SIXBIT,
}
}
@ -56,7 +56,7 @@ impl Resolution {
Resolution::TwelveBit => (1 << 12) - 1,
Resolution::TenBit => (1 << 10) - 1,
Resolution::EightBit => (1 << 8) - 1,
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0))]
#[cfg(any(adc_v1, adc_v2, adc_v3, adc_g0, adc_f3))]
Resolution::SixBit => (1 << 6) - 1,
}
}

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@ -1,4 +1,4 @@
#[cfg(not(any(adc_f3, adc_f3_v2)))]
#[cfg(not(adc_f3_v2))]
macro_rules! impl_sample_time {
($default_doc:expr, $default:ident, ($(($doc:expr, $variant:ident, $pac_variant:ident)),*)) => {
#[doc = concat!("ADC sample time\n\nThe default setting is ", $default_doc, " ADC clock cycles.")]
@ -105,3 +105,19 @@ impl_sample_time!(
("810.5", Cycles810_5, CYCLES810_5)
)
);
#[cfg(adc_f3)]
impl_sample_time!(
"1.5",
Cycles1_5,
(
("1.5", Cycles1_5, CYCLES1_5),
("2.5", Cycles2_5, CYCLES2_5),
("4.5", Cycles4_5, CYCLES4_5),
("7.5", Cycles7_5, CYCLES7_5),
("19.5", Cycles19_5, CYCLES19_5),
("61.5", Cycles61_5, CYCLES61_5),
("181.5", Cycles181_5, CYCLES181_5),
("601.5", Cycles601_5, CYCLES601_5)
)
);