From 7622d2eb61c030972756a962fee65e3ab66cfa10 Mon Sep 17 00:00:00 2001 From: xoviat Date: Tue, 5 Sep 2023 17:10:15 -0500 Subject: [PATCH] stm32: fix merge issues --- embassy-stm32/src/adc/v4.rs | 12 ++++++------ embassy-stm32/src/rcc/g4.rs | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index d03f2550..2ff5c8f9 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -107,20 +107,20 @@ macro_rules! rcc_peripheral { #[cfg(stm32g4)] foreach_peripheral!( - (adc, ADC1) => { rcc_peripheral!(ADC1, adc12, ahb2, adc12, ADC12_ENABLE_COUNTER); }; - (adc, ADC2) => { rcc_peripheral!(ADC2, adc12, ahb2, adc12, ADC12_ENABLE_COUNTER); }; + (adc, ADC1) => { rcc_peripheral!(ADC1, adc, ahb2, adc12, ADC12_ENABLE_COUNTER); }; + (adc, ADC2) => { rcc_peripheral!(ADC2, adc, ahb2, adc12, ADC12_ENABLE_COUNTER); }; ); #[cfg(stm32g4x1)] foreach_peripheral!( - (adc, ADC3) => { rcc_peripheral!(ADC3, adc345, ahb2, adc345); }; + (adc, ADC3) => { rcc_peripheral!(ADC3, adc34, ahb2, adc345); }; ); #[cfg(any(stm32g4x3, stm32g4x4))] foreach_peripheral!( - (adc, ADC3) => { rcc_peripheral!(ADC3, adc345, ahb2, adc345, ADC345_ENABLE_COUNTER); }; - (adc, ADC4) => { rcc_peripheral!(ADC4, adc345, ahb2, adc345, ADC345_ENABLE_COUNTER); }; - (adc, ADC5) => { rcc_peripheral!(ADC5, adc345, ahb2, adc345, ADC345_ENABLE_COUNTER); }; + (adc, ADC3) => { rcc_peripheral!(ADC3, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); }; + (adc, ADC4) => { rcc_peripheral!(ADC4, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); }; + (adc, ADC5) => { rcc_peripheral!(ADC5, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); }; ); #[cfg(stm32h7)] diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 4c95bb15..2359f39c 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -612,7 +612,7 @@ pub(crate) unsafe fn init(config: Config) { apb1_tim: Hertz(apb1_tim_freq), apb2: Hertz(apb2_freq), apb2_tim: Hertz(apb2_tim_freq), - adc12: adc12_ck, - adc345: adc345_ck, + adc: adc12_ck, + adc34: adc345_ck, }); }