buffered_uarte naming cleanup
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896eb0ed52
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@ -40,8 +40,8 @@ enum TxState {
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Transmitting(usize),
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Transmitting(usize),
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}
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}
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struct State<'a, T: Instance> {
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struct State<'a, U: Instance> {
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inner: T,
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inner: U,
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rx: RingBuffer<'a>,
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rx: RingBuffer<'a>,
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rx_state: RxState,
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rx_state: RxState,
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@ -60,11 +60,11 @@ struct State<'a, T: Instance> {
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/// are disabled before using `Uarte`. See product specification:
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/// are disabled before using `Uarte`. See product specification:
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/// - nrf52832: Section 15.2
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/// - nrf52832: Section 15.2
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/// - nrf52840: Section 6.1.2
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/// - nrf52840: Section 6.1.2
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pub struct BufferedUarte<'a, T: Instance> {
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pub struct BufferedUarte<'a, U: Instance> {
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inner: PeripheralMutex<T::Interrupt, State<'a, T>>,
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inner: PeripheralMutex<U::Interrupt, State<'a, U>>,
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}
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}
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impl<'a, T: Instance> Unpin for BufferedUarte<'a, T> {}
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impl<'a, U: Instance> Unpin for BufferedUarte<'a, U> {}
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#[cfg(any(feature = "52833", feature = "52840"))]
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#[cfg(any(feature = "52833", feature = "52840"))]
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fn port_bit(port: GpioPort) -> bool {
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fn port_bit(port: GpioPort) -> bool {
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@ -74,10 +74,10 @@ fn port_bit(port: GpioPort) -> bool {
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}
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}
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}
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}
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impl<'a, T: Instance> BufferedUarte<'a, T> {
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impl<'a, U: Instance> BufferedUarte<'a, U> {
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pub fn new(
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pub fn new(
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uarte: T,
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uarte: U,
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irq: T::Interrupt,
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irq: U::Interrupt,
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rx_buffer: &'a mut [u8],
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rx_buffer: &'a mut [u8],
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tx_buffer: &'a mut [u8],
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tx_buffer: &'a mut [u8],
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mut pins: Pins,
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mut pins: Pins,
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@ -159,19 +159,19 @@ impl<'a, T: Instance> BufferedUarte<'a, T> {
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}
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}
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}
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}
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fn inner(self: Pin<&mut Self>) -> Pin<&mut PeripheralMutex<T::Interrupt, State<'a, T>>> {
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fn inner(self: Pin<&mut Self>) -> Pin<&mut PeripheralMutex<U::Interrupt, State<'a, U>>> {
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unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) }
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unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) }
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}
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}
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}
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}
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impl<'a, T: Instance> Drop for BufferedUarte<'a, T> {
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impl<'a, U: Instance> Drop for BufferedUarte<'a, U> {
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fn drop(&mut self) {
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fn drop(&mut self) {
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// stop DMA before dropping, because DMA is using the buffer in `self`.
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// stop DMA before dropping, because DMA is using the buffer in `self`.
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todo!()
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todo!()
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}
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}
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}
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}
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impl<'a, T: Instance> AsyncBufRead for BufferedUarte<'a, T> {
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impl<'a, U: Instance> AsyncBufRead for BufferedUarte<'a, U> {
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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self.inner().with(|_irq, state| {
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self.inner().with(|_irq, state| {
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// Conservative compiler fence to prevent optimizations that do not
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// Conservative compiler fence to prevent optimizations that do not
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@ -211,7 +211,7 @@ impl<'a, T: Instance> AsyncBufRead for BufferedUarte<'a, T> {
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}
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}
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}
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}
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impl<'a, T: Instance> AsyncWrite for BufferedUarte<'a, T> {
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impl<'a, U: Instance> AsyncWrite for BufferedUarte<'a, U> {
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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self.inner().with(|irq, state| {
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self.inner().with(|irq, state| {
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trace!("poll_write: {:?}", buf.len());
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trace!("poll_write: {:?}", buf.len());
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@ -241,7 +241,7 @@ impl<'a, T: Instance> AsyncWrite for BufferedUarte<'a, T> {
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}
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}
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}
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}
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impl<'a, T: Instance> PeripheralState for State<'a, T> {
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impl<'a, U: Instance> PeripheralState for State<'a, U> {
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fn on_interrupt(&mut self) {
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fn on_interrupt(&mut self) {
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trace!("irq: start");
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trace!("irq: start");
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let mut more_work = true;
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let mut more_work = true;
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@ -380,15 +380,15 @@ impl<'a, T: Instance> PeripheralState for State<'a, T> {
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}
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}
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}
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}
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mod private {
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mod sealed {
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pub trait Sealed {}
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pub trait Instance {}
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impl Sealed for crate::pac::UARTE0 {}
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impl Instance for crate::pac::UARTE0 {}
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#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
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#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
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impl Sealed for crate::pac::UARTE1 {}
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impl Instance for crate::pac::UARTE1 {}
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}
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}
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pub trait Instance: Deref<Target = uarte0::RegisterBlock> + private::Sealed {
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pub trait Instance: Deref<Target = uarte0::RegisterBlock> + sealed::Instance {
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type Interrupt: OwnedInterrupt;
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type Interrupt: OwnedInterrupt;
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}
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}
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