From 88d4b0c00d5164f2fe6307bacce74887b3f8d4da Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 27 Nov 2021 02:21:53 +0100 Subject: [PATCH] stm32: add stm32g4 support. --- .vscode/settings.json | 9 +- ci.sh | 1 + embassy-stm32/Cargo.toml | 93 ++++++++++ embassy-stm32/src/pwr/g4.rs | 1 + embassy-stm32/src/pwr/mod.rs | 1 + embassy-stm32/src/rcc/g4/mod.rs | 219 ++++++++++++++++++++++++ embassy-stm32/src/rcc/mod.rs | 7 +- examples/stm32g0/Cargo.toml | 2 +- examples/stm32g4/.cargo/config.toml | 6 + examples/stm32g4/Cargo.toml | 22 +++ examples/stm32g4/build.rs | 5 + examples/stm32g4/src/bin/blinky.rs | 29 ++++ examples/stm32g4/src/bin/button.rs | 27 +++ examples/stm32g4/src/bin/button_exti.rs | 29 ++++ examples/stm32g4/src/example_common.rs | 17 ++ stm32-data | 2 +- stm32-gen-features/src/lib.rs | 5 +- 17 files changed, 466 insertions(+), 9 deletions(-) create mode 100644 embassy-stm32/src/pwr/g4.rs create mode 100644 embassy-stm32/src/rcc/g4/mod.rs create mode 100644 examples/stm32g4/.cargo/config.toml create mode 100644 examples/stm32g4/Cargo.toml create mode 100644 examples/stm32g4/build.rs create mode 100644 examples/stm32g4/src/bin/blinky.rs create mode 100644 examples/stm32g4/src/bin/button.rs create mode 100644 examples/stm32g4/src/bin/button_exti.rs create mode 100644 examples/stm32g4/src/example_common.rs diff --git a/.vscode/settings.json b/.vscode/settings.json index 2be7ffbe..0e67ab82 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -10,9 +10,12 @@ "rust-analyzer.cargo.target": "thumbv7em-none-eabi", "rust-analyzer.cargo.features": [ // These are needed to prevent embassy-net from failing to build - "embassy-net/medium-ethernet", - "embassy-net/tcp", - "embassy-net/pool-16", + //"embassy-net/medium-ethernet", + //"embassy-net/tcp", + //"embassy-net/pool-16", + ], + "rust-analyzer.linkedProjects": [ + "examples/stm32g4/Cargo.toml" ], "rust-analyzer.procMacro.enable": true, "rust-analyzer.cargo.runBuildScripts": true, diff --git a/ci.sh b/ci.sh index 8c6c2eeb..94370abd 100755 --- a/ci.sh +++ b/ci.sh @@ -47,6 +47,7 @@ cargo batch \ --- build --release --manifest-path examples/stm32f4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f4 \ --- build --release --manifest-path examples/stm32f7/Cargo.toml --target thumbv7em-none-eabihf --out-dir out/examples/stm32f7 \ --- build --release --manifest-path examples/stm32g0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32g0 \ + --- build --release --manifest-path examples/stm32g4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32g4 \ --- build --release --manifest-path examples/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7 \ --- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32l0 \ --- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 364c48f6..74903de0 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -564,6 +564,99 @@ stm32g0c1rc = [ "stm32-metapac/stm32g0c1rc" ] stm32g0c1re = [ "stm32-metapac/stm32g0c1re" ] stm32g0c1vc = [ "stm32-metapac/stm32g0c1vc" ] stm32g0c1ve = [ "stm32-metapac/stm32g0c1ve" ] +stm32g431c6 = [ "stm32-metapac/stm32g431c6" ] +stm32g431c8 = [ "stm32-metapac/stm32g431c8" ] +stm32g431cb = [ "stm32-metapac/stm32g431cb" ] +stm32g431k6 = [ "stm32-metapac/stm32g431k6" ] +stm32g431k8 = [ "stm32-metapac/stm32g431k8" ] +stm32g431kb = [ "stm32-metapac/stm32g431kb" ] +stm32g431m6 = [ "stm32-metapac/stm32g431m6" ] +stm32g431m8 = [ "stm32-metapac/stm32g431m8" ] +stm32g431mb = [ "stm32-metapac/stm32g431mb" ] +stm32g431r6 = [ "stm32-metapac/stm32g431r6" ] +stm32g431r8 = [ "stm32-metapac/stm32g431r8" ] +stm32g431rb = [ "stm32-metapac/stm32g431rb" ] +stm32g431v6 = [ "stm32-metapac/stm32g431v6" ] +stm32g431v8 = [ "stm32-metapac/stm32g431v8" ] +stm32g431vb = [ "stm32-metapac/stm32g431vb" ] +stm32g441cb = [ "stm32-metapac/stm32g441cb" ] +stm32g441kb = [ "stm32-metapac/stm32g441kb" ] +stm32g441mb = [ "stm32-metapac/stm32g441mb" ] +stm32g441rb = [ "stm32-metapac/stm32g441rb" ] +stm32g441vb = [ "stm32-metapac/stm32g441vb" ] +stm32g471cc = [ "stm32-metapac/stm32g471cc" ] +stm32g471ce = [ "stm32-metapac/stm32g471ce" ] +stm32g471mc = [ "stm32-metapac/stm32g471mc" ] +stm32g471me = [ "stm32-metapac/stm32g471me" ] +stm32g471qc = [ "stm32-metapac/stm32g471qc" ] +stm32g471qe = [ "stm32-metapac/stm32g471qe" ] +stm32g471rc = [ "stm32-metapac/stm32g471rc" ] +stm32g471re = [ "stm32-metapac/stm32g471re" ] +stm32g471vc = [ "stm32-metapac/stm32g471vc" ] +stm32g471ve = [ "stm32-metapac/stm32g471ve" ] +stm32g473cb = [ "stm32-metapac/stm32g473cb" ] +stm32g473cc = [ "stm32-metapac/stm32g473cc" ] +stm32g473ce = [ "stm32-metapac/stm32g473ce" ] +stm32g473mb = [ "stm32-metapac/stm32g473mb" ] +stm32g473mc = [ "stm32-metapac/stm32g473mc" ] +stm32g473me = [ "stm32-metapac/stm32g473me" ] +stm32g473pb = [ "stm32-metapac/stm32g473pb" ] +stm32g473pc = [ "stm32-metapac/stm32g473pc" ] +stm32g473pe = [ "stm32-metapac/stm32g473pe" ] +stm32g473qb = [ "stm32-metapac/stm32g473qb" ] +stm32g473qc = [ "stm32-metapac/stm32g473qc" ] +stm32g473qe = [ "stm32-metapac/stm32g473qe" ] +stm32g473rb = [ "stm32-metapac/stm32g473rb" ] +stm32g473rc = [ "stm32-metapac/stm32g473rc" ] +stm32g473re = [ "stm32-metapac/stm32g473re" ] +stm32g473vb = [ "stm32-metapac/stm32g473vb" ] +stm32g473vc = [ "stm32-metapac/stm32g473vc" ] +stm32g473ve = [ "stm32-metapac/stm32g473ve" ] +stm32g474cb = [ "stm32-metapac/stm32g474cb" ] +stm32g474cc = [ "stm32-metapac/stm32g474cc" ] +stm32g474ce = [ "stm32-metapac/stm32g474ce" ] +stm32g474mb = [ "stm32-metapac/stm32g474mb" ] +stm32g474mc = [ "stm32-metapac/stm32g474mc" ] +stm32g474me = [ "stm32-metapac/stm32g474me" ] +stm32g474pb = [ "stm32-metapac/stm32g474pb" ] +stm32g474pc = [ "stm32-metapac/stm32g474pc" ] +stm32g474pe = [ "stm32-metapac/stm32g474pe" ] +stm32g474qb = [ "stm32-metapac/stm32g474qb" ] +stm32g474qc = [ "stm32-metapac/stm32g474qc" ] +stm32g474qe = [ "stm32-metapac/stm32g474qe" ] +stm32g474rb = [ "stm32-metapac/stm32g474rb" ] +stm32g474rc = [ "stm32-metapac/stm32g474rc" ] +stm32g474re = [ "stm32-metapac/stm32g474re" ] +stm32g474vb = [ "stm32-metapac/stm32g474vb" ] +stm32g474vc = [ "stm32-metapac/stm32g474vc" ] +stm32g474ve = [ "stm32-metapac/stm32g474ve" ] +stm32g483ce = [ "stm32-metapac/stm32g483ce" ] +stm32g483me = [ "stm32-metapac/stm32g483me" ] +stm32g483pe = [ "stm32-metapac/stm32g483pe" ] +stm32g483qe = [ "stm32-metapac/stm32g483qe" ] +stm32g483re = [ "stm32-metapac/stm32g483re" ] +stm32g483ve = [ "stm32-metapac/stm32g483ve" ] +stm32g484ce = [ "stm32-metapac/stm32g484ce" ] +stm32g484me = [ "stm32-metapac/stm32g484me" ] +stm32g484pe = [ "stm32-metapac/stm32g484pe" ] +stm32g484qe = [ "stm32-metapac/stm32g484qe" ] +stm32g484re = [ "stm32-metapac/stm32g484re" ] +stm32g484ve = [ "stm32-metapac/stm32g484ve" ] +stm32g491cc = [ "stm32-metapac/stm32g491cc" ] +stm32g491ce = [ "stm32-metapac/stm32g491ce" ] +stm32g491kc = [ "stm32-metapac/stm32g491kc" ] +stm32g491ke = [ "stm32-metapac/stm32g491ke" ] +stm32g491mc = [ "stm32-metapac/stm32g491mc" ] +stm32g491me = [ "stm32-metapac/stm32g491me" ] +stm32g491rc = [ "stm32-metapac/stm32g491rc" ] +stm32g491re = [ "stm32-metapac/stm32g491re" ] +stm32g491vc = [ "stm32-metapac/stm32g491vc" ] +stm32g491ve = [ "stm32-metapac/stm32g491ve" ] +stm32g4a1ce = [ "stm32-metapac/stm32g4a1ce" ] +stm32g4a1ke = [ "stm32-metapac/stm32g4a1ke" ] +stm32g4a1me = [ "stm32-metapac/stm32g4a1me" ] +stm32g4a1re = [ "stm32-metapac/stm32g4a1re" ] +stm32g4a1ve = [ "stm32-metapac/stm32g4a1ve" ] stm32h723ve = [ "stm32-metapac/stm32h723ve" ] stm32h723vg = [ "stm32-metapac/stm32h723vg" ] stm32h723ze = [ "stm32-metapac/stm32h723ze" ] diff --git a/embassy-stm32/src/pwr/g4.rs b/embassy-stm32/src/pwr/g4.rs new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/embassy-stm32/src/pwr/g4.rs @@ -0,0 +1 @@ + diff --git a/embassy-stm32/src/pwr/mod.rs b/embassy-stm32/src/pwr/mod.rs index bd3d23ca..a71ce8f3 100644 --- a/embassy-stm32/src/pwr/mod.rs +++ b/embassy-stm32/src/pwr/mod.rs @@ -3,6 +3,7 @@ #[cfg_attr(pwr_f7, path = "f7.rs")] #[cfg_attr(pwr_wl5, path = "wl5.rs")] #[cfg_attr(pwr_g0, path = "g0.rs")] +#[cfg_attr(pwr_g4, path = "g4.rs")] #[cfg_attr(pwr_l1, path = "l1.rs")] #[cfg_attr(pwr_u5, path = "u5.rs")] mod _version; diff --git a/embassy-stm32/src/rcc/g4/mod.rs b/embassy-stm32/src/rcc/g4/mod.rs new file mode 100644 index 00000000..b0338e72 --- /dev/null +++ b/embassy-stm32/src/rcc/g4/mod.rs @@ -0,0 +1,219 @@ +pub use super::types::*; +use crate::pac; +use crate::peripherals::{self, RCC}; +use crate::rcc::{get_freqs, set_freqs, Clocks}; +use crate::time::Hertz; +use crate::time::U32Ext; +use core::marker::PhantomData; +use embassy::util::Unborrow; +use embassy_hal_common::unborrow; + +/// HSI speed +pub const HSI_FREQ: u32 = 16_000_000; + +/// LSI speed +pub const LSI_FREQ: u32 = 32_000; + +/// System clock mux source +#[derive(Clone, Copy)] +pub enum ClockSrc { + HSE(Hertz), + HSI16, +} + +impl Into for APBPrescaler { + fn into(self) -> u8 { + match self { + APBPrescaler::NotDivided => 1, + APBPrescaler::Div2 => 0x04, + APBPrescaler::Div4 => 0x05, + APBPrescaler::Div8 => 0x06, + APBPrescaler::Div16 => 0x07, + } + } +} + +impl Into for AHBPrescaler { + fn into(self) -> u8 { + match self { + AHBPrescaler::NotDivided => 1, + AHBPrescaler::Div2 => 0x08, + AHBPrescaler::Div4 => 0x09, + AHBPrescaler::Div8 => 0x0a, + AHBPrescaler::Div16 => 0x0b, + AHBPrescaler::Div64 => 0x0c, + AHBPrescaler::Div128 => 0x0d, + AHBPrescaler::Div256 => 0x0e, + AHBPrescaler::Div512 => 0x0f, + } + } +} + +/// Clocks configutation +pub struct Config { + mux: ClockSrc, + ahb_pre: AHBPrescaler, + apb1_pre: APBPrescaler, + apb2_pre: APBPrescaler, + low_power_run: bool, +} + +impl Default for Config { + #[inline] + fn default() -> Config { + Config { + mux: ClockSrc::HSI16, + ahb_pre: AHBPrescaler::NotDivided, + apb1_pre: APBPrescaler::NotDivided, + apb2_pre: APBPrescaler::NotDivided, + low_power_run: false, + } + } +} + +impl Config { + #[inline] + pub fn clock_src(mut self, mux: ClockSrc) -> Self { + self.mux = mux; + self + } + + #[inline] + pub fn ahb_pre(mut self, pre: AHBPrescaler) -> Self { + self.ahb_pre = pre; + self + } + + #[inline] + pub fn apb1_pre(mut self, pre: APBPrescaler) -> Self { + self.apb1_pre = pre; + self + } + + #[inline] + pub fn apb2_pre(mut self, pre: APBPrescaler) -> Self { + self.apb2_pre = pre; + self + } + + #[inline] + pub fn low_power_run(mut self, on: bool) -> Self { + self.low_power_run = on; + self + } +} + +/// RCC peripheral +pub struct Rcc<'d> { + _rb: peripherals::RCC, + phantom: PhantomData<&'d mut peripherals::RCC>, +} + +impl<'d> Rcc<'d> { + pub fn new(rcc: impl Unborrow + 'd) -> Self { + unborrow!(rcc); + Self { + _rb: rcc, + phantom: PhantomData, + } + } + + // Safety: RCC init must have been called + pub fn clocks(&self) -> &'static Clocks { + unsafe { get_freqs() } + } +} + +/// Extension trait that freezes the `RCC` peripheral with provided clocks configuration +pub trait RccExt { + fn freeze(self, config: Config) -> Clocks; +} + +impl RccExt for RCC { + #[inline] + fn freeze(self, cfgr: Config) -> Clocks { + let rcc = pac::RCC; + let (sys_clk, sw) = match cfgr.mux { + ClockSrc::HSI16 => { + // Enable HSI16 + unsafe { + rcc.cr().write(|w| w.set_hsion(true)); + while !rcc.cr().read().hsirdy() {} + } + + (HSI_FREQ, 0x01) + } + ClockSrc::HSE(freq) => { + // Enable HSE + unsafe { + rcc.cr().write(|w| w.set_hseon(true)); + while !rcc.cr().read().hserdy() {} + } + + (freq.0, 0x02) + } + }; + + unsafe { + rcc.cfgr().modify(|w| { + w.set_sw(sw.into()); + w.set_hpre(cfgr.ahb_pre.into()); + w.set_ppre1(cfgr.apb1_pre.into()); + w.set_ppre2(cfgr.apb2_pre.into()); + }); + } + + let ahb_freq: u32 = match cfgr.ahb_pre { + AHBPrescaler::NotDivided => sys_clk, + pre => { + let pre: u8 = pre.into(); + let pre = 1 << (pre as u32 - 7); + sys_clk / pre + } + }; + + let (apb1_freq, apb1_tim_freq) = match cfgr.apb1_pre { + APBPrescaler::NotDivided => (ahb_freq, ahb_freq), + pre => { + let pre: u8 = pre.into(); + let pre: u8 = 1 << (pre - 3); + let freq = ahb_freq / pre as u32; + (freq, freq * 2) + } + }; + + let (apb2_freq, apb2_tim_freq) = match cfgr.apb2_pre { + APBPrescaler::NotDivided => (ahb_freq, ahb_freq), + pre => { + let pre: u8 = pre.into(); + let pre: u8 = 1 << (pre - 3); + let freq = ahb_freq / pre as u32; + (freq, freq * 2) + } + }; + + let pwr = pac::PWR; + if cfgr.low_power_run { + assert!(sys_clk.hz() <= 2_000_000.hz()); + unsafe { + pwr.cr1().modify(|w| w.set_lpr(true)); + } + } + + Clocks { + sys: sys_clk.hz(), + ahb1: ahb_freq.hz(), + ahb2: ahb_freq.hz(), + apb1: apb1_freq.hz(), + apb1_tim: apb1_tim_freq.hz(), + apb2: apb2_freq.hz(), + apb2_tim: apb2_tim_freq.hz(), + } + } +} + +pub unsafe fn init(config: Config) { + let r = ::steal(); + let clocks = r.freeze(config); + set_freqs(clocks); +} diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 8db2f10e..cdcbd2af 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -30,10 +30,10 @@ pub struct Clocks { #[cfg(any(rcc_l0, rcc_l1, rcc_f0, rcc_f1, rcc_f0x0, rcc_g0))] pub ahb: Hertz, - #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] + #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_g4, rcc_u5, rcc_wb, rcc_wl5))] pub ahb1: Hertz, - #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] + #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_g4, rcc_u5, rcc_wb, rcc_wl5))] pub ahb2: Hertz, #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] @@ -100,6 +100,9 @@ cfg_if::cfg_if! { } else if #[cfg(any(rcc_g0))] { mod g0; pub use g0::*; + } else if #[cfg(any(rcc_g4))] { + mod g4; + pub use g4::*; } else if #[cfg(any(rcc_u5))] { mod u5; pub use u5::*; diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml index 203cdad9..731116c3 100644 --- a/examples/stm32g0/Cargo.toml +++ b/examples/stm32g0/Cargo.toml @@ -8,7 +8,7 @@ resolver = "2" [dependencies] embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt"] } embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "time-driver-tim2", "stm32g071rb", "unstable-pac"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "time-driver-tim2", "stm32g071rb", "memory-x", "unstable-pac"] } embassy-hal-common = {version = "0.1.0", path = "../../embassy-hal-common" } defmt = "0.3" diff --git a/examples/stm32g4/.cargo/config.toml b/examples/stm32g4/.cargo/config.toml new file mode 100644 index 00000000..62003c2a --- /dev/null +++ b/examples/stm32g4/.cargo/config.toml @@ -0,0 +1,6 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace STM32G071C8Rx with your chip as listed in `probe-run --list-chips` +runner = "probe-run --chip STM32G484VETx" + +[build] +target = "thumbv7em-none-eabi" diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml new file mode 100644 index 00000000..0f9d77f5 --- /dev/null +++ b/examples/stm32g4/Cargo.toml @@ -0,0 +1,22 @@ +[package] +authors = ["Dario Nieuwenhuis ", "Ben Gamari "] +edition = "2018" +name = "embassy-stm32g4-examples" +version = "0.1.0" +resolver = "2" + +[dependencies] +embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt"] } +embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "time-driver-tim2", "stm32g491re", "memory-x", "unstable-pac"] } +embassy-hal-common = {version = "0.1.0", path = "../../embassy-hal-common" } + +defmt = "0.3" +defmt-rtt = "0.3" + +cortex-m = "0.7.3" +cortex-m-rt = "0.7.0" +embedded-hal = "0.2.6" +panic-probe = { version = "0.3", features = ["print-defmt"] } +futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +heapless = { version = "0.7.5", default-features = false } diff --git a/examples/stm32g4/build.rs b/examples/stm32g4/build.rs new file mode 100644 index 00000000..8cd32d7e --- /dev/null +++ b/examples/stm32g4/build.rs @@ -0,0 +1,5 @@ +fn main() { + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/stm32g4/src/bin/blinky.rs b/examples/stm32g4/src/bin/blinky.rs new file mode 100644 index 00000000..a43922a6 --- /dev/null +++ b/examples/stm32g4/src/bin/blinky.rs @@ -0,0 +1,29 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy::executor::Spawner; +use embassy::time::{Duration, Timer}; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::Peripherals; +use embedded_hal::digital::v2::OutputPin; +use example_common::*; + +#[embassy::main] +async fn main(_spawner: Spawner, p: Peripherals) { + info!("Hello World!"); + + let mut led = Output::new(p.PA5, Level::High, Speed::Low); + + loop { + info!("high"); + unwrap!(led.set_high()); + Timer::after(Duration::from_millis(300)).await; + + info!("low"); + unwrap!(led.set_low()); + Timer::after(Duration::from_millis(300)).await; + } +} diff --git a/examples/stm32g4/src/bin/button.rs b/examples/stm32g4/src/bin/button.rs new file mode 100644 index 00000000..f0a4c874 --- /dev/null +++ b/examples/stm32g4/src/bin/button.rs @@ -0,0 +1,27 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; +use cortex_m_rt::entry; +use embassy_stm32::gpio::{Input, Pull}; +use embedded_hal::digital::v2::InputPin; +use example_common::*; + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let p = embassy_stm32::init(Default::default()); + + let button = Input::new(p.PC13, Pull::Down); + + loop { + if unwrap!(button.is_high()) { + info!("high"); + } else { + info!("low"); + } + } +} diff --git a/examples/stm32g4/src/bin/button_exti.rs b/examples/stm32g4/src/bin/button_exti.rs new file mode 100644 index 00000000..2c4318d6 --- /dev/null +++ b/examples/stm32g4/src/bin/button_exti.rs @@ -0,0 +1,29 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy::executor::Spawner; +use embassy_stm32::exti::ExtiInput; +use embassy_stm32::gpio::{Input, Pull}; +use embassy_stm32::Peripherals; +use embassy_traits::gpio::{WaitForFallingEdge, WaitForRisingEdge}; +use example_common::*; + +#[embassy::main] +async fn main(_spawner: Spawner, p: Peripherals) { + info!("Hello World!"); + + let button = Input::new(p.PC13, Pull::Down); + let mut button = ExtiInput::new(button, p.EXTI13); + + info!("Press the USER button..."); + + loop { + button.wait_for_rising_edge().await; + info!("Pressed!"); + button.wait_for_falling_edge().await; + info!("Released!"); + } +} diff --git a/examples/stm32g4/src/example_common.rs b/examples/stm32g4/src/example_common.rs new file mode 100644 index 00000000..54d63383 --- /dev/null +++ b/examples/stm32g4/src/example_common.rs @@ -0,0 +1,17 @@ +#![macro_use] + +use defmt_rtt as _; // global logger +use panic_probe as _; + +pub use defmt::*; + +use core::sync::atomic::{AtomicUsize, Ordering}; + +defmt::timestamp! {"{=u64}", { + static COUNT: AtomicUsize = AtomicUsize::new(0); + // NOTE(no-CAS) `timestamps` runs with interrupts disabled + let n = COUNT.load(Ordering::Relaxed); + COUNT.store(n + 1, Ordering::Relaxed); + n as u64 + } +} diff --git a/stm32-data b/stm32-data index 0b75cf54..e60ce40e 160000 --- a/stm32-data +++ b/stm32-data @@ -1 +1 @@ -Subproject commit 0b75cf54e0836673cf4eee8273befb15e22637c4 +Subproject commit e60ce40e6f9d29e9a8b45ea7b9118e0d55b30928 diff --git a/stm32-gen-features/src/lib.rs b/stm32-gen-features/src/lib.rs index 29ea94a4..50c33485 100644 --- a/stm32-gen-features/src/lib.rs +++ b/stm32-gen-features/src/lib.rs @@ -2,12 +2,13 @@ use std::{iter::FilterMap, path::Path, slice::Iter}; -const SUPPORTED_FAMILIES: [&str; 12] = [ +const SUPPORTED_FAMILIES: &[&str] = &[ "stm32f0", "stm32f1", "stm32f4", "stm32f7", "stm32g0", + "stm32g4", "stm32l0", "stm32l1", "stm32l4", @@ -99,7 +100,7 @@ pub fn embassy_stm32_needed_data(names_and_cores: &[(String, Vec)]) -> S if cores.len() > 1 { for core_name in cores.iter() { result += &format!( - "{chip}_{core} = [ \"stm32-metapac/{chip}_{core}\" ]\n", + "{chip}-{core} = [ \"stm32-metapac/{chip}-{core}\" ]\n", chip = chip_name, core = core_name );