From 0705152105287a4c03ffdc21a460d1a26e67c9f6 Mon Sep 17 00:00:00 2001 From: xoviat Date: Wed, 9 Aug 2023 20:15:14 -0500 Subject: [PATCH 01/10] stm32/rtc: add start/stop wakeup --- embassy-stm32/src/rtc/v2.rs | 67 +++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 5b896069..f15ab806 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -22,6 +22,73 @@ impl super::Rtc { } } + #[allow(dead_code)] + #[cfg(all(feature = "time", stm32wb))] + // start the wakeup alarm with the given duration + pub(crate) fn start_wakeup_alarm(duration: embassy_time::Duration) { + use embassy_time::TICK_HZ; + use stm32_metapac::rtc::vals::Wucksel; + + use crate::interrupt::typelevel::Interrupt; + use crate::rcc::get_freqs; + + let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64; + + // Choose the lowest prescaler available + #[cfg(stm32wb)] + let rtc_hz = rtc_hz / 2; + + let rtc_ticks = duration.as_ticks() * rtc_hz / TICK_HZ; + let rtc_ticks = if rtc_ticks > u16::MAX as u64 { + u16::MAX + } else { + rtc_ticks as u16 + }; + + while !RTC::regs().isr().read().wutf() {} + + RTC::regs().isr().modify(|w| w.set_wutf(false)); + + RTC::regs().wutr().modify(|w| w.set_wut(rtc_ticks)); + + crate::interrupt::typelevel::RTC_WKUP::unpend(); + unsafe { crate::interrupt::typelevel::RTC_WKUP::enable() }; + + RTC::regs().cr().modify(|w| { + // Choose the lowest prescaler available + #[cfg(stm32wb)] + w.set_wucksel(Wucksel::DIV2); + + w.set_wutie(true); + w.set_wute(true); + }); + } + + #[allow(dead_code)] + #[cfg(all(feature = "time", stm32wb))] + // stop the wakeup alarm and return the time remaining + pub(crate) fn stop_wakeup_alarm() -> embassy_time::Duration { + use embassy_time::{Duration, TICK_HZ}; + + use crate::interrupt::typelevel::Interrupt; + use crate::rcc::get_freqs; + + crate::interrupt::typelevel::RTC_WKUP::disable(); + + RTC::regs().cr().modify(|w| { + w.set_wute(false); + }); + + let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64; + + // Choose the lowest prescaler available + #[cfg(stm32wb)] + let rtc_hz = rtc_hz / 2; + let rtc_ticks = RTC::regs().wutr().read().wut(); + + Duration::from_ticks(rtc_ticks as u64 * TICK_HZ / rtc_hz) + } + #[allow(dead_code)] pub(crate) fn set_clock_source(clock_source: RtcClockSource) { #[cfg(not(rtc_v2wb))] From a0c69ffe024588aab3c4cca70a73275851967616 Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 10 Aug 2023 18:59:18 -0500 Subject: [PATCH 02/10] stm32/rtc: autocompute wakeup psc. --- embassy-stm32/src/rtc/v2.rs | 96 ++++++++++++++++++++++++++++++------- 1 file changed, 80 insertions(+), 16 deletions(-) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index f15ab806..32ccb845 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -5,6 +5,69 @@ use crate::pac::rtc::Rtc; use crate::peripherals::RTC; use crate::rtc::sealed::Instance; +#[derive(Clone, Copy)] +pub(crate) enum WakeupPrescaler { + Div2, + Div4, + Div8, + Div16, +} + +#[cfg(stm32wb)] +impl From for crate::pac::rtc::vals::Wucksel { + fn from(val: WakeupPrescaler) -> Self { + use crate::pac::rtc::vals::Wucksel; + + match val { + WakeupPrescaler::Div2 => Wucksel::DIV2, + WakeupPrescaler::Div4 => Wucksel::DIV4, + WakeupPrescaler::Div8 => Wucksel::DIV8, + WakeupPrescaler::Div16 => Wucksel::DIV16, + } + } +} + +#[cfg(stm32wb)] +impl From for WakeupPrescaler { + fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { + use crate::pac::rtc::vals::Wucksel; + + match val { + Wucksel::DIV2 => WakeupPrescaler::Div2, + Wucksel::DIV4 => WakeupPrescaler::Div4, + Wucksel::DIV8 => WakeupPrescaler::Div8, + Wucksel::DIV16 => WakeupPrescaler::Div16, + _ => unreachable!(), + } + } +} + +impl From for u32 { + fn from(val: WakeupPrescaler) -> Self { + match val { + WakeupPrescaler::Div2 => 2, + WakeupPrescaler::Div4 => 4, + WakeupPrescaler::Div8 => 8, + WakeupPrescaler::Div16 => 16, + } + } +} + +impl WakeupPrescaler { + pub fn compute_min(val: u32) -> Self { + *[ + WakeupPrescaler::Div2, + WakeupPrescaler::Div4, + WakeupPrescaler::Div8, + WakeupPrescaler::Div16, + ] + .iter() + .skip_while(|psc| >::into(**psc) <= val) + .next() + .unwrap_or(&WakeupPrescaler::Div16) + } +} + impl super::Rtc { fn unlock_registers() { #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))] @@ -24,44 +87,45 @@ impl super::Rtc { #[allow(dead_code)] #[cfg(all(feature = "time", stm32wb))] - // start the wakeup alarm with the given duration - pub(crate) fn start_wakeup_alarm(duration: embassy_time::Duration) { - use embassy_time::TICK_HZ; - use stm32_metapac::rtc::vals::Wucksel; + /// start the wakeup alarm and return the actual duration of the alarm + /// the actual duration will be the closest value possible that is less + /// than the requested duration. + pub(crate) fn start_wakeup_alarm(requested_duration: embassy_time::Duration) -> embassy_time::Duration { + use embassy_time::{Duration, TICK_HZ}; use crate::interrupt::typelevel::Interrupt; use crate::rcc::get_freqs; let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64; - // Choose the lowest prescaler available - #[cfg(stm32wb)] - let rtc_hz = rtc_hz / 2; + let rtc_ticks = requested_duration.as_ticks() * rtc_hz / TICK_HZ; + let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32); - let rtc_ticks = duration.as_ticks() * rtc_hz / TICK_HZ; + // adjust the rtc ticks to the prescaler + let rtc_ticks = rtc_ticks / (>::into(prescaler) as u64); let rtc_ticks = if rtc_ticks > u16::MAX as u64 { u16::MAX } else { rtc_ticks as u16 }; - while !RTC::regs().isr().read().wutf() {} - - RTC::regs().isr().modify(|w| w.set_wutf(false)); - - RTC::regs().wutr().modify(|w| w.set_wut(rtc_ticks)); + let duration = Duration::from_ticks( + rtc_ticks as u64 * TICK_HZ * (>::into(prescaler) as u64) / rtc_hz, + ); crate::interrupt::typelevel::RTC_WKUP::unpend(); unsafe { crate::interrupt::typelevel::RTC_WKUP::enable() }; + RTC::regs().wutr().modify(|w| w.set_wut(rtc_ticks)); + RTC::regs().cr().modify(|w| { - // Choose the lowest prescaler available - #[cfg(stm32wb)] - w.set_wucksel(Wucksel::DIV2); + w.set_wucksel(prescaler.into()); w.set_wutie(true); w.set_wute(true); }); + + duration } #[allow(dead_code)] From b69861013aaacad913d99268fa6da634ab7e0c10 Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 10 Aug 2023 19:13:48 -0500 Subject: [PATCH 03/10] stm32/rtc: implement stop_wakeup_alarm --- embassy-stm32/src/rtc/v2.rs | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 32ccb845..5cd5adef 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -137,20 +137,24 @@ impl super::Rtc { use crate::interrupt::typelevel::Interrupt; use crate::rcc::get_freqs; - crate::interrupt::typelevel::RTC_WKUP::disable(); - RTC::regs().cr().modify(|w| { w.set_wute(false); }); - let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64; + // Wait for the wakeup timer to stop + while !RTC::regs().isr().read().wutf() {} - // Choose the lowest prescaler available - #[cfg(stm32wb)] - let rtc_hz = rtc_hz / 2; + RTC::regs().isr().modify(|w| w.set_wutf(false)); + + crate::interrupt::typelevel::RTC_WKUP::disable(); + + let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64; + let prescaler: WakeupPrescaler = RTC::regs().cr().read().wucksel().into(); let rtc_ticks = RTC::regs().wutr().read().wut(); - Duration::from_ticks(rtc_ticks as u64 * TICK_HZ / rtc_hz) + Duration::from_ticks( + rtc_ticks as u64 * TICK_HZ * (>::into(prescaler) as u64) / rtc_hz, + ) } #[allow(dead_code)] From 3a3f3b492f95ac54b3cae2ea1ba9f61d2ab6496d Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 10 Aug 2023 19:14:55 -0500 Subject: [PATCH 04/10] rustfmt --- embassy-stm32/src/rtc/mod.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index 945bfafd..a6102077 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs @@ -13,6 +13,7 @@ pub use self::datetime::{DateTime, DayOfWeek, Error as DateTimeError}; )] #[cfg_attr(any(rtc_v3, rtc_v3u5), path = "v3.rs")] mod _version; +#[allow(unused_imports)] pub use _version::*; use embassy_hal_internal::Peripheral; From f723982beccc1306a74560e6455f38834ea95689 Mon Sep 17 00:00:00 2001 From: xoviat Date: Mon, 21 Aug 2023 17:44:38 -0500 Subject: [PATCH 05/10] rtc: impl. draft rtcinstant api --- embassy-stm32/src/rtc/v2.rs | 123 ++++++++++++++++++++++++++++-------- 1 file changed, 97 insertions(+), 26 deletions(-) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 5cd5adef..ba881e3f 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -5,6 +5,63 @@ use crate::pac::rtc::Rtc; use crate::peripherals::RTC; use crate::rtc::sealed::Instance; +#[cfg(all(feature = "time", any(stm32wb, stm32f4)))] +pub struct RtcInstant { + ssr: u16, + st: u8, +} + +#[cfg(all(feature = "time", any(stm32wb, stm32f4)))] +impl RtcInstant { + pub fn now() -> Self { + // TODO: read value twice + use crate::rtc::bcd2_to_byte; + + let tr = RTC::regs().tr().read(); + let ssr = RTC::regs().ssr().read().ss(); + + let st = bcd2_to_byte((tr.st(), tr.su())); + + let _ = RTC::regs().dr().read(); + + trace!("ssr: {}", ssr); + trace!("st: {}", st); + + Self { ssr, st } + } +} + +#[cfg(all(feature = "time", any(stm32wb, stm32f4)))] +impl core::ops::Sub for RtcInstant { + type Output = embassy_time::Duration; + + fn sub(self, rhs: Self) -> Self::Output { + use embassy_time::{Duration, TICK_HZ}; + + trace!("self st: {}", self.st); + trace!("other st: {}", rhs.st); + + let st = if self.st < rhs.st { self.st + 60 } else { self.st }; + + trace!("self st: {}", st); + + let self_ticks = (st as u32 * 256 + self.ssr as u32); + let other_ticks = (rhs.st as u32 * 256 + rhs.ssr as u32); + let rtc_ticks = self_ticks - other_ticks; + + trace!("self ticks: {}", self_ticks); + trace!("other ticks: {}", other_ticks); + trace!("rtc ticks: {}", rtc_ticks); + + // TODO: read prescaler + + Duration::from_ticks( + ((((st as u32 * 256 + self.ssr as u32) - (rhs.st as u32 * 256 + rhs.ssr as u32)) * TICK_HZ as u32) as u32 + / 256u32) as u64, + ) + } +} + #[derive(Clone, Copy)] pub(crate) enum WakeupPrescaler { Div2, @@ -13,7 +70,7 @@ pub(crate) enum WakeupPrescaler { Div16, } -#[cfg(stm32wb)] +#[cfg(any(stm32wb, stm32f4))] impl From for crate::pac::rtc::vals::Wucksel { fn from(val: WakeupPrescaler) -> Self { use crate::pac::rtc::vals::Wucksel; @@ -27,7 +84,7 @@ impl From for crate::pac::rtc::vals::Wucksel { } } -#[cfg(stm32wb)] +#[cfg(any(stm32wb, stm32f4))] impl From for WakeupPrescaler { fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { use crate::pac::rtc::vals::Wucksel; @@ -86,11 +143,14 @@ impl super::Rtc { } #[allow(dead_code)] - #[cfg(all(feature = "time", stm32wb))] + #[cfg(all(feature = "time", any(stm32wb, stm32f4)))] /// start the wakeup alarm and return the actual duration of the alarm /// the actual duration will be the closest value possible that is less /// than the requested duration. - pub(crate) fn start_wakeup_alarm(requested_duration: embassy_time::Duration) -> embassy_time::Duration { + /// + /// note: this api is exposed for testing purposes until low power is implemented. + /// it is not intended to be public + pub fn start_wakeup_alarm(requested_duration: embassy_time::Duration) -> RtcInstant { use embassy_time::{Duration, TICK_HZ}; use crate::interrupt::typelevel::Interrupt; @@ -103,8 +163,8 @@ impl super::Rtc { // adjust the rtc ticks to the prescaler let rtc_ticks = rtc_ticks / (>::into(prescaler) as u64); - let rtc_ticks = if rtc_ticks > u16::MAX as u64 { - u16::MAX + let rtc_ticks = if rtc_ticks >= u16::MAX as u64 { + u16::MAX - 1 } else { rtc_ticks as u16 }; @@ -113,8 +173,10 @@ impl super::Rtc { rtc_ticks as u64 * TICK_HZ * (>::into(prescaler) as u64) / rtc_hz, ); - crate::interrupt::typelevel::RTC_WKUP::unpend(); - unsafe { crate::interrupt::typelevel::RTC_WKUP::enable() }; + trace!("set wakeup timer for {} ms", duration.as_millis()); + + RTC::regs().wpr().write(|w| w.set_key(0xca)); + RTC::regs().wpr().write(|w| w.set_key(0x53)); RTC::regs().wutr().modify(|w| w.set_wut(rtc_ticks)); @@ -125,36 +187,45 @@ impl super::Rtc { w.set_wute(true); }); - duration + if !RTC::regs().cr().read().wute() { + trace!("wakeup timer not enabled"); + } else { + trace!("wakeup timer enabled"); + } + + crate::interrupt::typelevel::RTC_WKUP::unpend(); + unsafe { crate::interrupt::typelevel::RTC_WKUP::enable() }; + + RtcInstant::now() } #[allow(dead_code)] - #[cfg(all(feature = "time", stm32wb))] - // stop the wakeup alarm and return the time remaining - pub(crate) fn stop_wakeup_alarm() -> embassy_time::Duration { - use embassy_time::{Duration, TICK_HZ}; - + #[cfg(all(feature = "time", any(stm32wb, stm32f4)))] + /// stop the wakeup alarm and return the time remaining + /// + /// note: this api is exposed for testing purposes until low power is implemented. + /// it is not intended to be public + pub fn stop_wakeup_alarm() -> RtcInstant { use crate::interrupt::typelevel::Interrupt; - use crate::rcc::get_freqs; + + crate::interrupt::typelevel::RTC_WKUP::disable(); + + trace!("disable wakeup timer..."); RTC::regs().cr().modify(|w| { w.set_wute(false); }); + trace!("wait for wakeup timer stop..."); + // Wait for the wakeup timer to stop - while !RTC::regs().isr().read().wutf() {} + // while !RTC::regs().isr().read().wutf() {} + // + // RTC::regs().isr().modify(|w| w.set_wutf(false)); - RTC::regs().isr().modify(|w| w.set_wutf(false)); + trace!("wait for wakeup timer stop...done"); - crate::interrupt::typelevel::RTC_WKUP::disable(); - - let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64; - let prescaler: WakeupPrescaler = RTC::regs().cr().read().wucksel().into(); - let rtc_ticks = RTC::regs().wutr().read().wut(); - - Duration::from_ticks( - rtc_ticks as u64 * TICK_HZ * (>::into(prescaler) as u64) / rtc_hz, - ) + RtcInstant::now() } #[allow(dead_code)] From 8c12453544131a5ef8a6be78e87c8e49a12cbec3 Mon Sep 17 00:00:00 2001 From: xoviat Date: Mon, 21 Aug 2023 17:50:18 -0500 Subject: [PATCH 06/10] stm32/rcc: set rtc clock on f4 --- embassy-stm32/src/rcc/f4.rs | 7 +++++++ embassy-stm32/src/rcc/mod.rs | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/rcc/f4.rs b/embassy-stm32/src/rcc/f4.rs index 2ae0d15c..ee9cb289 100644 --- a/embassy-stm32/src/rcc/f4.rs +++ b/embassy-stm32/src/rcc/f4.rs @@ -473,6 +473,11 @@ pub(crate) unsafe fn init(config: Config) { Rtc::set_clock_source(clock_source); }); + let rtc = match config.rtc { + Some(RtcClockSource::LSI) => Some(LSI_FREQ), + _ => None, + }; + set_freqs(Clocks { sys: Hertz(sysclk), apb1: Hertz(pclk1), @@ -492,6 +497,8 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))] pllsai: None, + + rtc: rtc, }); } diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 62c19bda..698da8d8 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -74,7 +74,7 @@ pub struct Clocks { #[cfg(any(rcc_h5, rcc_h50, rcc_h7, rcc_h7ab))] pub adc: Option, - #[cfg(rcc_wb)] + #[cfg(any(rcc_wb, rcc_f4))] /// Set only if the lsi or lse is configured pub rtc: Option, } From 7148397771a7c1a374d4b298b206f815573772f8 Mon Sep 17 00:00:00 2001 From: xoviat Date: Mon, 21 Aug 2023 18:00:49 -0500 Subject: [PATCH 07/10] stm32/rtc: misc fixes --- embassy-stm32/src/rtc/v2.rs | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index ba881e3f..7acf1b6a 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -18,9 +18,15 @@ impl RtcInstant { use crate::rtc::bcd2_to_byte; let tr = RTC::regs().tr().read(); + let tr2 = RTC::regs().tr().read(); let ssr = RTC::regs().ssr().read().ss(); + let ssr2 = RTC::regs().ssr().read().ss(); let st = bcd2_to_byte((tr.st(), tr.su())); + let st2 = bcd2_to_byte((tr2.st(), tr2.su())); + + assert!(st == st2); + assert!(ssr == ssr2); let _ = RTC::regs().dr().read(); @@ -41,12 +47,15 @@ impl core::ops::Sub for RtcInstant { trace!("self st: {}", self.st); trace!("other st: {}", rhs.st); + trace!("self ssr: {}", self.ssr); + trace!("other ssr: {}", rhs.ssr); + let st = if self.st < rhs.st { self.st + 60 } else { self.st }; trace!("self st: {}", st); - let self_ticks = (st as u32 * 256 + self.ssr as u32); - let other_ticks = (rhs.st as u32 * 256 + rhs.ssr as u32); + let self_ticks = st as u32 * 256 + self.ssr as u32; + let other_ticks = rhs.st as u32 * 256 + rhs.ssr as u32; let rtc_ticks = self_ticks - other_ticks; trace!("self ticks: {}", self_ticks); From 5bfddfc9b6c5b64cecba377cc6c42e1e270e98cc Mon Sep 17 00:00:00 2001 From: xoviat Date: Mon, 21 Aug 2023 18:10:10 -0500 Subject: [PATCH 08/10] stm32/rcc: add rtc to f410 --- embassy-stm32/src/rcc/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 698da8d8..4d4c6b61 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -74,7 +74,7 @@ pub struct Clocks { #[cfg(any(rcc_h5, rcc_h50, rcc_h7, rcc_h7ab))] pub adc: Option, - #[cfg(any(rcc_wb, rcc_f4))] + #[cfg(any(rcc_wb, rcc_f4, rcc_f410))] /// Set only if the lsi or lse is configured pub rtc: Option, } From 8878ce046c2665eb641f33bc484ca68083d7d353 Mon Sep 17 00:00:00 2001 From: xoviat Date: Mon, 21 Aug 2023 18:33:10 -0500 Subject: [PATCH 09/10] rtc: fix rtcinstant delay computation --- embassy-stm32/src/rtc/v2.rs | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 7acf1b6a..e9b83123 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -54,8 +54,8 @@ impl core::ops::Sub for RtcInstant { trace!("self st: {}", st); - let self_ticks = st as u32 * 256 + self.ssr as u32; - let other_ticks = rhs.st as u32 * 256 + rhs.ssr as u32; + let self_ticks = st as u32 * 256 + (255 - self.ssr as u32); + let other_ticks = rhs.st as u32 * 256 + (255 - rhs.ssr as u32); let rtc_ticks = self_ticks - other_ticks; trace!("self ticks: {}", self_ticks); @@ -65,7 +65,8 @@ impl core::ops::Sub for RtcInstant { // TODO: read prescaler Duration::from_ticks( - ((((st as u32 * 256 + self.ssr as u32) - (rhs.st as u32 * 256 + rhs.ssr as u32)) * TICK_HZ as u32) as u32 + ((((st as u32 * 256 + (255u32 - self.ssr as u32)) - (rhs.st as u32 * 256 + (255u32 - rhs.ssr as u32))) + * TICK_HZ as u32) as u32 / 256u32) as u64, ) } From 048bdf6968773a642c60ddcac46958d3a54af7c3 Mon Sep 17 00:00:00 2001 From: xoviat Date: Tue, 22 Aug 2023 16:48:08 -0500 Subject: [PATCH 10/10] stm32/rtc: allow dead code --- embassy-stm32/src/rtc/v2.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index e9b83123..53d0161d 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -72,6 +72,7 @@ impl core::ops::Sub for RtcInstant { } } +#[allow(dead_code)] #[derive(Clone, Copy)] pub(crate) enum WakeupPrescaler { Div2, @@ -120,6 +121,7 @@ impl From for u32 { } } +#[allow(dead_code)] impl WakeupPrescaler { pub fn compute_min(val: u32) -> Self { *[