Add status checks
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@ -126,7 +126,7 @@ impl<'d, T: Instance> Spis<'d, T> {
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let r = T::regs();
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// Configure pins
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// Configure pins.
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sck.conf().write(|w| w.input().connect().drive().h0h1());
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cs.conf().write(|w| w.input().connect().drive().h0h1());
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if let Some(mosi) = &mosi {
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@ -151,10 +151,6 @@ impl<'d, T: Instance> Spis<'d, T> {
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}
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}
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if config.auto_acquire {
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r.shorts.write(|w| w.end_acquire().bit(true));
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}
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// Select pins.
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r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) });
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r.psel.csn.write(|w| unsafe { w.bits(cs.psel_bits()) });
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@ -193,15 +189,20 @@ impl<'d, T: Instance> Spis<'d, T> {
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w
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});
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// Set over-read character
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// Set over-read character.
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let orc = config.orc;
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r.orc.write(|w| unsafe { w.orc().bits(orc) });
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// Set default character
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// Set default character.
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let def = config.def;
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r.def.write(|w| unsafe { w.def().bits(def) });
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// Disable all events interrupts
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// Configure auto-acquire on 'transfer end' event.
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if config.auto_acquire {
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r.shorts.write(|w| w.end_acquire().bit(true));
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}
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// Disable all events interrupts.
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r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
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irq.set_handler(Self::on_interrupt);
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@ -245,11 +246,11 @@ impl<'d, T: Instance> Spis<'d, T> {
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as _) });
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r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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// Reset and enable the end event
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// Reset and enable the end event.
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r.events_end.reset();
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r.intenset.write(|w| w.end().set());
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// Release the semaphore
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// Release the semaphore.
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r.tasks_release.write(|w| unsafe { w.bits(1) });
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Ok(())
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@ -287,12 +288,15 @@ impl<'d, T: Instance> Spis<'d, T> {
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let r = T::regs();
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let s = T::state();
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// Clear status register.
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r.status.write(|w| w.overflow().clear().overread().clear());
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if r.semstat.read().bits() != 1 {
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// Reset and enable the acquire event
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// Reset and enable the acquire event.
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r.events_acquired.reset();
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r.intenset.write(|w| w.acquired().set());
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// Requests acquiring the SPIS semaphore
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// Request acquiring the SPIS semaphore.
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r.tasks_acquire.write(|w| unsafe { w.bits(1) });
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// Wait for 'acquire' event.
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@ -341,81 +345,92 @@ impl<'d, T: Instance> Spis<'d, T> {
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}
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/// Reads data from the SPI bus without sending anything. Blocks until the buffer has been filled.
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/// Returns number of bytes read
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/// Returns number of bytes read.
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pub fn blocking_read(&mut self, data: &mut [u8]) -> Result<usize, Error> {
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self.blocking_inner(data, &[]).map(|n| n.0)
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}
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/// Simultaneously sends and receives data. Blocks until the transmission is completed.
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/// If necessary, the write buffer will be copied into RAM (see struct description for detail).
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/// Returns number of bytes transferred `(n_rx, n_tx)`
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/// Returns number of bytes transferred `(n_rx, n_tx)`.
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pub fn blocking_transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(usize, usize), Error> {
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self.blocking_inner(read, write)
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}
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/// Same as [`blocking_transfer`](Spis::blocking_transfer) but will fail instead of copying data into RAM. Consult the module level documentation to learn more.
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/// Returns number of bytes transferred `(n_rx, n_tx)`
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/// Returns number of bytes transferred `(n_rx, n_tx)`.
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pub fn blocking_transfer_from_ram(&mut self, read: &mut [u8], write: &[u8]) -> Result<(usize, usize), Error> {
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self.blocking_inner(read, write)
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}
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/// Simultaneously sends and receives data.
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/// Places the received data into the same buffer and blocks until the transmission is completed.
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/// Returns number of bytes transferred
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/// Returns number of bytes transferred.
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pub fn blocking_transfer_in_place(&mut self, data: &mut [u8]) -> Result<usize, Error> {
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self.blocking_inner_from_ram(data, data).map(|n| n.0)
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}
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/// Sends data, discarding any received data. Blocks until the transmission is completed.
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/// If necessary, the write buffer will be copied into RAM (see struct description for detail).
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/// Returns number of bytes written
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/// Returns number of bytes written.
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pub fn blocking_write(&mut self, data: &[u8]) -> Result<usize, Error> {
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self.blocking_inner(&mut [], data).map(|n| n.1)
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}
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/// Same as [`blocking_write`](Spis::blocking_write) but will fail instead of copying data into RAM. Consult the module level documentation to learn more.
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/// Returns number of bytes written
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/// Returns number of bytes written.
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pub fn blocking_write_from_ram(&mut self, data: &[u8]) -> Result<usize, Error> {
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self.blocking_inner(&mut [], data).map(|n| n.1)
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}
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/// Reads data from the SPI bus without sending anything.
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/// Returns number of bytes read
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/// Returns number of bytes read.
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pub async fn read(&mut self, data: &mut [u8]) -> Result<usize, Error> {
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self.async_inner(data, &[]).await.map(|n| n.0)
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}
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/// Simultaneously sends and receives data.
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/// If necessary, the write buffer will be copied into RAM (see struct description for detail).
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/// Returns number of bytes transferred `(n_rx, n_tx)`
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/// Returns number of bytes transferred `(n_rx, n_tx)`.
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pub async fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(usize, usize), Error> {
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self.async_inner(read, write).await
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}
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/// Same as [`transfer`](Spis::transfer) but will fail instead of copying data into RAM. Consult the module level documentation to learn more.
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/// Returns number of bytes transferred `(n_rx, n_tx)`
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/// Returns number of bytes transferred `(n_rx, n_tx)`.
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pub async fn transfer_from_ram(&mut self, read: &mut [u8], write: &[u8]) -> Result<(usize, usize), Error> {
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self.async_inner_from_ram(read, write).await
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}
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/// Simultaneously sends and receives data. Places the received data into the same buffer.
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/// Returns number of bytes transferred
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/// Returns number of bytes transferred.
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pub async fn transfer_in_place(&mut self, data: &mut [u8]) -> Result<usize, Error> {
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self.async_inner_from_ram(data, data).await.map(|n| n.0)
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}
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/// Sends data, discarding any received data.
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/// If necessary, the write buffer will be copied into RAM (see struct description for detail).
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/// Returns number of bytes written
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/// Returns number of bytes written.
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pub async fn write(&mut self, data: &[u8]) -> Result<usize, Error> {
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self.async_inner(&mut [], data).await.map(|n| n.1)
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}
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/// Same as [`write`](Spis::write) but will fail instead of copying data into RAM. Consult the module level documentation to learn more.
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/// Returns number of bytes written
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/// Returns number of bytes written.
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pub async fn write_from_ram(&mut self, data: &[u8]) -> Result<usize, Error> {
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self.async_inner_from_ram(&mut [], data).await.map(|n| n.1)
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}
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/// Checks if last transaction overread.
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pub fn is_overread(&mut self) -> bool {
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T::regs().status.read().overread().is_present()
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}
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/// Checks if last transaction overflowed.
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pub fn is_overflow(&mut self) -> bool {
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T::regs().status.read().overflow().is_present()
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}
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}
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impl<'d, T: Instance> Drop for Spis<'d, T> {
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@ -516,15 +531,15 @@ impl<'d, T: Instance> SetConfig for Spis<'d, T> {
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w
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});
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// Set over-read character
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// Set over-read character.
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let orc = config.orc;
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r.orc.write(|w| unsafe { w.orc().bits(orc) });
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// Set default character
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// Set default character.
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let def = config.def;
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r.def.write(|w| unsafe { w.def().bits(def) });
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// Set auto acquire
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// Configure auto-acquire on 'transfer end' event.
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let auto_acquire = config.auto_acquire;
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r.shorts.write(|w| w.end_acquire().bit(auto_acquire));
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}
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@ -5,7 +5,7 @@
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use defmt::info;
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use embassy_executor::Spawner;
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use embassy_nrf::interrupt;
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use embassy_nrf::spis::{self, Config};
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use embassy_nrf::spis::{Spis, Config};
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use {defmt_rtt as _, panic_probe as _};
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#[embassy_executor::main]
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@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) {
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info!("Running!");
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let irq = interrupt::take!(SPIM2_SPIS2_SPI2);
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let mut spis = spis::Spis::new(p.SPI2, irq, p.P0_31, p.P0_29, p.P0_28, p.P0_30, Config::default());
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let mut spis = Spis::new(p.SPI2, irq, p.P0_31, p.P0_29, p.P0_28, p.P0_30, Config::default());
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loop {
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let mut buf = [0_u8; 64];
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