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nrf: pwm clarify stop and disable pin state

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This commit is contained in:
Jacob Rosenthal 2021-11-13 16:38:35 -07:00
parent 2bcacd4f16
commit 7dfc0acb2f
1 changed files with 10 additions and 19 deletions
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29
embassy-nrf/src/pwm.rs
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@ -308,19 +308,23 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
Task::from_reg(&r.tasks_stop) Task::from_reg(&r.tasks_stop)
} }
/// Stop playback. /// Stop playback. Does NOT clear the last duty cycle from the pin.
#[inline(always)] #[inline(always)]
pub fn stop(&self) { pub fn stop(&self) {
let r = T::regs(); let r = T::regs();
r.enable.write(|w| w.enable().disabled());
r.shorts.reset(); r.shorts.reset();
compiler_fence(Ordering::SeqCst); compiler_fence(Ordering::SeqCst);
r.events_stopped.reset();
// tasks_stop() doesn't exist in all svds so write its bit instead // tasks_stop() doesn't exist in all svds so write its bit instead
r.tasks_stop.write(|w| unsafe { w.bits(0x01) }); r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
while r.events_stopped.read().bits() == 0 {}
r.enable.write(|w| w.enable().disabled());
} }
} }
@ -513,19 +517,6 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
pwm pwm
} }
/// Stop playback
#[inline(always)]
pub fn stop(&self) {
let r = T::regs();
r.shorts.reset();
compiler_fence(Ordering::SeqCst);
// tasks_stop() doesn't exist in all svds so write its bit instead
r.tasks_stop.write(|w| unsafe { w.bits(0x01) });
}
/// Enables the PWM generator. /// Enables the PWM generator.
#[inline(always)] #[inline(always)]
pub fn enable(&self) { pub fn enable(&self) {
@ -533,7 +524,7 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
r.enable.write(|w| w.enable().enabled()); r.enable.write(|w| w.enable().enabled());
} }
/// Disables the PWM generator. /// Disables the PWM generator. Does NOT clear the last duty cycle from the pin.
#[inline(always)] #[inline(always)]
pub fn disable(&self) { pub fn disable(&self) {
let r = T::regs(); let r = T::regs();
@ -554,13 +545,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
// defensive before seqstart // defensive before seqstart
compiler_fence(Ordering::SeqCst); compiler_fence(Ordering::SeqCst);
r.events_seqend[0].reset();
// tasks_seqstart() doesn't exist in all svds so write its bit instead // tasks_seqstart() doesn't exist in all svds so write its bit instead
r.tasks_seqstart[0].write(|w| unsafe { w.bits(1) }); r.tasks_seqstart[0].write(|w| unsafe { w.bits(1) });
// defensive wait until waveform is loaded after seqstart so set_duty // defensive wait until waveform is loaded after seqstart so set_duty
// can't be called again while dma is still reading // can't be called again while dma is still reading
while r.events_seqend[0].read().bits() == 0 {} while r.events_seqend[0].read().bits() == 0 {}
r.events_seqend[0].write(|w| w);
} }
/// Sets the PWM clock prescaler. /// Sets the PWM clock prescaler.
@ -620,7 +612,6 @@ impl<'a, T: Instance> Drop for SimplePwm<'a, T> {
fn drop(&mut self) { fn drop(&mut self) {
let r = T::regs(); let r = T::regs();
self.stop();
self.disable(); self.disable();
if let Some(pin) = &self.ch0 { if let Some(pin) = &self.ch0 {