stm32: add some docs.
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@ -36,6 +36,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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}
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/// The level on the VSync pin when the data is not valid on the parallel interface.
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#[allow(missing_docs)]
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#[derive(Clone, Copy, PartialEq)]
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pub enum VSyncDataInvalidLevel {
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Low,
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@ -43,6 +44,7 @@ pub enum VSyncDataInvalidLevel {
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}
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/// The level on the VSync pin when the data is not valid on the parallel interface.
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#[allow(missing_docs)]
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#[derive(Clone, Copy, PartialEq)]
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pub enum HSyncDataInvalidLevel {
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Low,
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@ -50,14 +52,16 @@ pub enum HSyncDataInvalidLevel {
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}
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#[derive(Clone, Copy, PartialEq)]
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#[allow(missing_docs)]
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pub enum PixelClockPolarity {
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RisingEdge,
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FallingEdge,
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}
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pub struct State {
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struct State {
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waker: AtomicWaker,
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}
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impl State {
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const fn new() -> State {
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State {
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@ -68,18 +72,25 @@ impl State {
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static STATE: State = State::new();
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/// DCMI error.
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#[derive(Debug, Eq, PartialEq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {
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/// Overrun error: the hardware generated data faster than we could read it.
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Overrun,
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/// Internal peripheral error.
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PeripheralError,
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}
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/// DCMI configuration.
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#[non_exhaustive]
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pub struct Config {
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/// VSYNC level.
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pub vsync_level: VSyncDataInvalidLevel,
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/// HSYNC level.
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pub hsync_level: HSyncDataInvalidLevel,
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/// PIXCLK polarity.
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pub pixclk_polarity: PixelClockPolarity,
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}
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@ -105,6 +116,7 @@ macro_rules! config_pins {
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};
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}
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/// DCMI driver.
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pub struct Dcmi<'d, T: Instance, Dma: FrameDma<T>> {
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inner: PeripheralRef<'d, T>,
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dma: PeripheralRef<'d, Dma>,
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@ -115,6 +127,7 @@ where
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T: Instance,
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Dma: FrameDma<T>,
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{
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/// Create a new DCMI driver with 8 data bits.
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pub fn new_8bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -139,6 +152,7 @@ where
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Self::new_inner(peri, dma, config, false, 0b00)
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}
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/// Create a new DCMI driver with 10 data bits.
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pub fn new_10bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -165,6 +179,7 @@ where
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Self::new_inner(peri, dma, config, false, 0b01)
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}
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/// Create a new DCMI driver with 12 data bits.
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pub fn new_12bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -193,6 +208,7 @@ where
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Self::new_inner(peri, dma, config, false, 0b10)
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}
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/// Create a new DCMI driver with 14 data bits.
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pub fn new_14bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -223,6 +239,7 @@ where
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Self::new_inner(peri, dma, config, false, 0b11)
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}
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/// Create a new DCMI driver with 8 data bits, with embedded synchronization.
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pub fn new_es_8bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -245,6 +262,7 @@ where
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Self::new_inner(peri, dma, config, true, 0b00)
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}
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/// Create a new DCMI driver with 10 data bits, with embedded synchronization.
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pub fn new_es_10bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -269,6 +287,7 @@ where
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Self::new_inner(peri, dma, config, true, 0b01)
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}
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/// Create a new DCMI driver with 12 data bits, with embedded synchronization.
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pub fn new_es_12bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -295,6 +314,7 @@ where
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Self::new_inner(peri, dma, config, true, 0b10)
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}
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/// Create a new DCMI driver with 14 data bits, with embedded synchronization.
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pub fn new_es_14bit(
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peri: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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@ -538,7 +558,9 @@ mod sealed {
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}
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}
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/// DCMI instance.
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pub trait Instance: sealed::Instance + 'static {
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/// Interrupt for this instance.
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type Interrupt: interrupt::typelevel::Interrupt;
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}
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