stm32: add some docs.
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@ -18,12 +18,17 @@ impl Into<u8> for QspiMode {
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}
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}
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/// QSPI lane width
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#[allow(dead_code)]
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#[derive(Copy, Clone)]
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pub enum QspiWidth {
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/// None
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NONE,
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/// Single lane
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SING,
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/// Dual lanes
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DUAL,
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/// Quad lanes
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QUAD,
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}
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@ -38,10 +43,13 @@ impl Into<u8> for QspiWidth {
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}
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}
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/// Flash bank selection
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#[allow(dead_code)]
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#[derive(Copy, Clone)]
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pub enum FlashSelection {
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/// Bank 1
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Flash1,
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/// Bank 2
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Flash2,
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}
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@ -54,6 +62,8 @@ impl Into<bool> for FlashSelection {
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}
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}
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/// QSPI memory size.
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum MemorySize {
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_1KiB,
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@ -113,11 +123,16 @@ impl Into<u8> for MemorySize {
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}
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}
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/// QSPI Address size
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#[derive(Copy, Clone)]
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pub enum AddressSize {
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/// 8-bit address
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_8Bit,
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/// 16-bit address
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_16Bit,
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/// 24-bit address
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_24bit,
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/// 32-bit address
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_32bit,
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}
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@ -132,8 +147,10 @@ impl Into<u8> for AddressSize {
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}
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}
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/// Time the Chip Select line stays high.
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum ChipSelectHightTime {
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pub enum ChipSelectHighTime {
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_1Cycle,
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_2Cycle,
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_3Cycle,
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@ -144,21 +161,23 @@ pub enum ChipSelectHightTime {
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_8Cycle,
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}
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impl Into<u8> for ChipSelectHightTime {
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impl Into<u8> for ChipSelectHighTime {
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fn into(self) -> u8 {
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match self {
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ChipSelectHightTime::_1Cycle => 0,
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ChipSelectHightTime::_2Cycle => 1,
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ChipSelectHightTime::_3Cycle => 2,
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ChipSelectHightTime::_4Cycle => 3,
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ChipSelectHightTime::_5Cycle => 4,
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ChipSelectHightTime::_6Cycle => 5,
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ChipSelectHightTime::_7Cycle => 6,
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ChipSelectHightTime::_8Cycle => 7,
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ChipSelectHighTime::_1Cycle => 0,
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ChipSelectHighTime::_2Cycle => 1,
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ChipSelectHighTime::_3Cycle => 2,
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ChipSelectHighTime::_4Cycle => 3,
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ChipSelectHighTime::_5Cycle => 4,
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ChipSelectHighTime::_6Cycle => 5,
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ChipSelectHighTime::_7Cycle => 6,
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ChipSelectHighTime::_8Cycle => 7,
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}
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}
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}
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/// FIFO threshold.
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum FIFOThresholdLevel {
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_1Bytes,
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@ -234,6 +253,8 @@ impl Into<u8> for FIFOThresholdLevel {
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}
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}
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/// Dummy cycle count
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum DummyCycles {
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_0,
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