stm32: replace peripheral_rcc!
macrotable with build.rs
This commit is contained in:
parent
d1a9680422
commit
8160af6af9
@ -145,6 +145,91 @@ fn main() {
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)*
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)*
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});
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});
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// ========
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// Generate RccPeripheral impls
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for p in METADATA.peripherals {
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if !singletons.contains(&p.name.to_string()) {
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continue;
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}
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if let Some(rcc) = &p.rcc {
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let en = rcc.enable.as_ref().unwrap();
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let rst = match &rcc.reset {
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Some(rst) => {
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let rst_reg = format_ident!("{}", rst.register.to_ascii_lowercase());
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let set_rst_field = format_ident!("set_{}", rst.field.to_ascii_lowercase());
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quote! {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true));
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crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false));
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});
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}
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}
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None => TokenStream::new(),
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};
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let pname = format_ident!("{}", p.name);
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let clk = format_ident!("{}", rcc.clock.to_ascii_lowercase());
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let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
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let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
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g.extend(quote! {
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impl crate::rcc::sealed::RccPeripheral for peripherals::#pname {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| unsafe {
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crate::rcc::get_freqs().#clk
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})
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}
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fn enable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true))
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})
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}
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fn disable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false));
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})
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}
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fn reset() {
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#rst
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}
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}
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impl crate::rcc::RccPeripheral for peripherals::#pname {}
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});
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}
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}
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// ========
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// Generate fns to enable GPIO, DMA in RCC
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for kind in ["dma", "bdma", "dmamux", "gpio"] {
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let mut gg = TokenStream::new();
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for p in METADATA.peripherals {
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if p.registers.is_some() && p.registers.as_ref().unwrap().kind == kind {
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if let Some(rcc) = &p.rcc {
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let en = rcc.enable.as_ref().unwrap();
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let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
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let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
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gg.extend(quote! {
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crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
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})
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}
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}
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}
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let fname = format_ident!("init_{}", kind);
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g.extend(quote! {
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pub unsafe fn #fname(){
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#gg
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}
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})
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}
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// ========
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// ========
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// Write generated.rs
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// Write generated.rs
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@ -9,7 +9,6 @@ use embassy::waitqueue::AtomicWaker;
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use crate::dma::Request;
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use crate::dma::Request;
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use crate::pac;
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use crate::pac;
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use crate::pac::bdma::vals;
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use crate::pac::bdma::vals;
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use crate::rcc::sealed::RccPeripheral;
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use super::{Word, WordSize};
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use super::{Word, WordSize};
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@ -77,11 +76,7 @@ pub(crate) unsafe fn init() {
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crate::interrupt::$irq::steal().enable();
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crate::interrupt::$irq::steal().enable();
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};
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};
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}
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}
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pac::peripherals! {
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crate::generated::init_bdma();
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(bdma, $peri:ident) => {
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crate::peripherals::$peri::enable();
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};
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}
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}
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}
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pac::dma_channels! {
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pac::dma_channels! {
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@ -7,7 +7,6 @@ use embassy::waitqueue::AtomicWaker;
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use crate::interrupt;
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use crate::interrupt;
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use crate::pac;
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use crate::pac;
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use crate::pac::dma::{regs, vals};
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use crate::pac::dma::{regs, vals};
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use crate::rcc::sealed::RccPeripheral;
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use super::{Request, Word, WordSize};
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use super::{Request, Word, WordSize};
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@ -74,11 +73,7 @@ pub(crate) unsafe fn init() {
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interrupt::$irq::steal().enable();
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interrupt::$irq::steal().enable();
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};
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};
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}
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}
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pac::peripherals! {
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crate::generated::init_dma();
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(dma, $peri:ident) => {
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crate::peripherals::$peri::enable();
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};
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}
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}
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}
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pac::dma_channels! {
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pac::dma_channels! {
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@ -49,11 +49,5 @@ pac::dma_channels! {
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/// safety: must be called only once
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/// safety: must be called only once
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pub(crate) unsafe fn init() {
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pub(crate) unsafe fn init() {
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crate::pac::peripheral_rcc! {
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crate::generated::init_dmamux();
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($name:ident, dmamux, DMAMUX, $clock:ident, ($reg:ident, $field:ident, $set_field:ident), $rst:tt) => {
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crate::pac::RCC.$reg().modify(|reg| {
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reg.$set_field(true);
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});
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};
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}
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}
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}
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@ -608,13 +608,7 @@ crate::pac::pins!(
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);
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);
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pub(crate) unsafe fn init() {
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pub(crate) unsafe fn init() {
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crate::pac::peripheral_rcc! {
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crate::generated::init_gpio();
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($name:ident, gpio, GPIO, $clock:ident, ($reg:ident, $field:ident, $set_field:ident), $rst:tt) => {
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crate::pac::RCC.$reg().modify(|reg| {
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reg.$set_field(true);
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});
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};
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}
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}
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}
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mod eh02 {
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mod eh02 {
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@ -1,6 +1,5 @@
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#![macro_use]
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#![macro_use]
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use crate::peripherals;
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use crate::time::Hertz;
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use crate::time::Hertz;
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use core::mem::MaybeUninit;
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use core::mem::MaybeUninit;
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@ -104,66 +103,3 @@ pub(crate) mod sealed {
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}
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}
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pub trait RccPeripheral: sealed::RccPeripheral + 'static {}
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pub trait RccPeripheral: sealed::RccPeripheral + 'static {}
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crate::pac::peripheral_rcc!(
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($inst:ident, gpio, GPIO, $clk:ident, $en:tt, $rst:tt) => {};
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($inst:ident, $module:ident, $block:ident, $clk:ident, ($en_reg:ident, $en_field:ident, $en_set_field:ident), ($rst_reg:ident, $rst_field:ident, $rst_set_field:ident)) => {
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impl sealed::RccPeripheral for peripherals::$inst {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| {
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unsafe { get_freqs().$clk }
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})
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}
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fn enable() {
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critical_section::with(|_| {
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unsafe {
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crate::pac::RCC.$en_reg().modify(|w| w.$en_set_field(true));
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}
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})
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}
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fn disable() {
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critical_section::with(|_| {
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unsafe {
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crate::pac::RCC.$en_reg().modify(|w| w.$en_set_field(false));
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}
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})
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}
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fn reset() {
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critical_section::with(|_| {
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unsafe {
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crate::pac::RCC.$rst_reg().modify(|w| w.$rst_set_field(true));
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crate::pac::RCC.$rst_reg().modify(|w| w.$rst_set_field(false));
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}
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})
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}
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}
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impl RccPeripheral for peripherals::$inst {}
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};
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($inst:ident, $module:ident, $block:ident, $clk:ident, ($en_reg:ident, $en_field:ident, $en_set_field:ident), _) => {
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impl sealed::RccPeripheral for peripherals::$inst {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| {
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unsafe { get_freqs().$clk }
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})
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}
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fn enable() {
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critical_section::with(|_| {
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unsafe {
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crate::pac::RCC.$en_reg().modify(|w| w.$en_set_field(true));
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}
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})
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}
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fn disable() {
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critical_section::with(|_| {
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unsafe {
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crate::pac::RCC.$en_reg().modify(|w| w.$en_set_field(false));
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}
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})
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}
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fn reset() {}
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}
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impl RccPeripheral for peripherals::$inst {}
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};
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);
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@ -126,7 +126,6 @@ pub fn gen_chip(
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let mut interrupt_table: Vec<Vec<String>> = Vec::new();
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let mut interrupt_table: Vec<Vec<String>> = Vec::new();
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let mut peripherals_table: Vec<Vec<String>> = Vec::new();
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let mut peripherals_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_pins_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_pins_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_rcc_table: Vec<Vec<String>> = Vec::new();
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let mut dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_counts: BTreeMap<String, u8> = BTreeMap::new();
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let mut peripheral_counts: BTreeMap<String, u8> = BTreeMap::new();
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@ -264,34 +263,6 @@ pub fn gen_chip(
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}
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}
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_ => {}
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_ => {}
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}
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}
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if let Some(rcc) = &p.rcc {
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let mut clock = rcc.clock.to_ascii_lowercase();
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if p.name.starts_with("TIM") {
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clock = format!("{}_tim", clock)
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}
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let mut row = Vec::new();
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row.push(p.name.clone());
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row.push(bi.kind.clone());
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row.push(bi.block.clone());
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row.push(clock);
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for reg in [&rcc.enable, &rcc.reset] {
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if let Some(reg) = reg {
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row.push(format!(
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"({}, {}, set_{})",
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reg.register.to_ascii_lowercase(),
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reg.field.to_ascii_lowercase(),
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reg.field.to_ascii_lowercase()
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));
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} else {
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row.push("_".to_string())
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}
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}
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peripheral_rcc_table.push(row);
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}
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}
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}
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dev.peripherals.push(ir_peri);
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dev.peripherals.push(ir_peri);
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@ -422,7 +393,6 @@ pub fn gen_chip(
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"peripheral_dma_channels",
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"peripheral_dma_channels",
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&peripheral_dma_channels_table,
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&peripheral_dma_channels_table,
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);
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);
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make_table(&mut data, "peripheral_rcc", &peripheral_rcc_table);
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make_table(&mut data, "dma_channels", &dma_channels_table);
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make_table(&mut data, "dma_channels", &dma_channels_table);
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make_table(&mut data, "dbgmcu", &dbgmcu_table);
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make_table(&mut data, "dbgmcu", &dbgmcu_table);
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make_peripheral_counts(&mut data, &peripheral_counts);
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make_peripheral_counts(&mut data, &peripheral_counts);
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