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Flush MISO before transfer operation

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This commit is contained in:
Ulf Lilleengen 2021-12-02 11:38:43 +01:00
parent 9a730ef692
commit 81ec4c82fd
3 changed files with 11 additions and 2 deletions
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3
embassy-lora/src/sx127x/sx127x_lora/mod.rs
View File

@ -560,9 +560,8 @@ where
byte: u8,
) -> Result<(), Error<E, CS::Error, RESET::Error>> {
self.cs.set_low().map_err(CS)?;
let mut rx = [0, 0];
let buffer = [reg | 0x80, byte];
self.spi.read_write(&mut rx, &buffer).await.map_err(SPI)?;
self.spi.write(&buffer).await.map_err(SPI)?;
self.cs.set_high().map_err(CS)?;
Ok(())
}

5
embassy-stm32/src/spi/v2.rs
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@ -262,6 +262,11 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cr2().modify(|reg| {
reg.set_rxdmaen(true);
});
// Flush the read buffer to avoid errornous data from being read
while T::regs().sr().read().rxne() {
let _ = T::regs().dr().read();
}
}
Self::set_word_size(WordSize::EightBit);

5
embassy-stm32/src/spi/v3.rs
View File

@ -284,6 +284,11 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
T::regs().cfg1().modify(|reg| {
reg.set_rxdmaen(true);
});
// Flush the read buffer to avoid errornous data from being read
while T::regs().sr().read().rxp() {
let _ = T::regs().rxdr().read();
}
}
let rx_request = self.rxdma.request();