rp: update rp-pac.
This commit is contained in:
@@ -542,7 +542,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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reset::unreset_wait(peris);
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}
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unsafe fn configure_rosc(config: RoscConfig) -> u32 {
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fn configure_rosc(config: RoscConfig) -> u32 {
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let p = pac::ROSC;
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p.freqa().write(|w| {
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@@ -620,7 +620,7 @@ pub fn clk_rtc_freq() -> u16 {
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CLOCKS.rtc.load(Ordering::Relaxed)
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}
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unsafe fn start_xosc(crystal_hz: u32) {
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fn start_xosc(crystal_hz: u32) {
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pac::XOSC
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.ctrl()
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.write(|w| w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ));
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@@ -635,7 +635,7 @@ unsafe fn start_xosc(crystal_hz: u32) {
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}
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#[inline(always)]
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unsafe fn configure_pll(p: pac::pll::Pll, input_freq: u32, config: PllConfig) -> u32 {
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fn configure_pll(p: pac::pll::Pll, input_freq: u32, config: PllConfig) -> u32 {
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let ref_freq = input_freq / config.refdiv as u32;
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assert!(config.fbdiv >= 16 && config.fbdiv <= 320);
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assert!(config.post_div1 >= 1 && config.post_div1 <= 7);
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@@ -700,9 +700,7 @@ impl<'d, T: Pin> Gpin<'d, T> {
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pub fn new<P: GpinPin>(gpin: impl Peripheral<P = P> + 'd) -> Gpin<'d, P> {
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into_ref!(gpin);
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unsafe {
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gpin.io().ctrl().write(|w| w.set_funcsel(0x08));
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}
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gpin.io().ctrl().write(|w| w.set_funcsel(0x08));
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Gpin {
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gpin: gpin.map_into(),
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@@ -717,12 +715,10 @@ impl<'d, T: Pin> Gpin<'d, T> {
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impl<'d, T: Pin> Drop for Gpin<'d, T> {
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fn drop(&mut self) {
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unsafe {
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self.gpin
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.io()
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.ctrl()
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0));
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}
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self.gpin
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.io()
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.ctrl()
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0));
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}
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}
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@@ -768,53 +764,43 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
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pub fn new(gpout: impl Peripheral<P = T> + 'd) -> Self {
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into_ref!(gpout);
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unsafe {
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gpout.io().ctrl().write(|w| w.set_funcsel(0x08));
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}
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gpout.io().ctrl().write(|w| w.set_funcsel(0x08));
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Self { gpout }
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}
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pub fn set_div(&self, int: u32, frac: u8) {
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unsafe {
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let c = pac::CLOCKS;
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c.clk_gpout_div(self.gpout.number()).write(|w| {
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w.set_int(int);
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w.set_frac(frac);
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});
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}
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let c = pac::CLOCKS;
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c.clk_gpout_div(self.gpout.number()).write(|w| {
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w.set_int(int);
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w.set_frac(frac);
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});
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}
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pub fn set_src(&self, src: GpoutSrc) {
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unsafe {
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_auxsrc(ClkGpoutCtrlAuxsrc(src as _));
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});
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}
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_auxsrc(ClkGpoutCtrlAuxsrc(src as _));
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});
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}
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pub fn enable(&self) {
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unsafe {
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_enable(true);
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});
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}
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_enable(true);
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});
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}
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pub fn disable(&self) {
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unsafe {
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_enable(false);
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});
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}
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_enable(false);
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});
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}
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pub fn get_freq(&self) -> u32 {
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let c = pac::CLOCKS;
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let src = unsafe { c.clk_gpout_ctrl(self.gpout.number()).read().auxsrc() };
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let src = c.clk_gpout_ctrl(self.gpout.number()).read().auxsrc();
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let base = match src {
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ClkGpoutCtrlAuxsrc::CLKSRC_PLL_SYS => pll_sys_freq(),
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@@ -831,7 +817,7 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
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_ => unreachable!(),
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};
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let div = unsafe { c.clk_gpout_div(self.gpout.number()).read() };
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let div = c.clk_gpout_div(self.gpout.number()).read();
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let int = if div.int() == 0 { 65536 } else { div.int() } as u64;
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let frac = div.frac() as u64;
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@@ -842,12 +828,10 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
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impl<'d, T: GpoutPin> Drop for Gpout<'d, T> {
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fn drop(&mut self) {
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self.disable();
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unsafe {
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self.gpout
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.io()
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.ctrl()
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0));
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}
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self.gpout
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.io()
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.ctrl()
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0));
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}
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}
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@@ -864,7 +848,7 @@ impl RoscRng {
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let mut acc = 0;
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for _ in 0..u8::BITS {
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acc <<= 1;
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acc |= unsafe { random_reg.read().randombit() as u8 };
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acc |= random_reg.read().randombit() as u8;
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}
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acc
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}
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