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Update Embassy, to new PIO API.

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This commit is contained in:
Dario Nieuwenhuis
2023-05-13 02:20:46 +02:00
parent 6b5d9642d5
commit 8800caa216
7 changed files with 112 additions and 118 deletions
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1
cyw43-pio/Cargo.toml
View File

@ -8,4 +8,5 @@ cyw43 = { path = "../" }
embassy-rp = { version = "0.1.0", features = ["unstable-traits", "nightly", "unstable-pac", "time-driver"] }
pio-proc = "0.2"
pio = "0.2.1"
fixed = "1.23.1"
defmt = { version = "0.3", optional = true }

151
cyw43-pio/src/lib.rs
View File

@ -6,30 +6,39 @@ use core::slice;
use cyw43::SpiBusCyw43;
use embassy_rp::dma::Channel;
use embassy_rp::gpio::{Drive, Output, Pin, Pull, SlewRate};
use embassy_rp::pio::{PioStateMachine, ShiftDirection};
use embassy_rp::gpio::{Drive, Level, Output, Pin, Pull, SlewRate};
use embassy_rp::pio::{Common, Config, Direction, Instance, Irq, PioPin, ShiftDirection, StateMachine};
use embassy_rp::relocate::RelocatedProgram;
use embassy_rp::{pio_instr_util, Peripheral};
use pio::Wrap;
use embassy_rp::{pio_instr_util, Peripheral, PeripheralRef};
use fixed::FixedU32;
use pio_proc::pio_asm;
pub struct PioSpi<CS: Pin, SM, DMA> {
cs: Output<'static, CS>,
sm: SM,
dma: DMA,
pub struct PioSpi<'d, CS: Pin, PIO: Instance, const SM: usize, DMA> {
cs: Output<'d, CS>,
sm: StateMachine<'d, PIO, SM>,
irq: Irq<'d, PIO, 0>,
dma: PeripheralRef<'d, DMA>,
wrap_target: u8,
}
impl<CS, SM, DMA> PioSpi<CS, SM, DMA>
impl<'d, CS, PIO, const SM: usize, DMA> PioSpi<'d, CS, PIO, SM, DMA>
where
SM: PioStateMachine,
DMA: Channel,
CS: Pin,
PIO: Instance,
{
pub fn new<DIO, CLK>(mut sm: SM, cs: Output<'static, CS>, dio: DIO, clk: CLK, dma: DMA) -> Self
pub fn new<DIO, CLK>(
common: &mut Common<'d, PIO>,
mut sm: StateMachine<'d, PIO, SM>,
irq: Irq<'d, PIO, 0>,
cs: Output<'d, CS>,
dio: DIO,
clk: CLK,
dma: impl Peripheral<P = DMA> + 'd,
) -> Self
where
DIO: Pin,
CLK: Pin,
DIO: PioPin,
CLK: PioPin,
{
let program = pio_asm!(
".side_set 1"
@ -42,8 +51,8 @@ where
// switch directions
"set pindirs, 0 side 0"
// these nops seem to be necessary for fast clkdiv
"nop side 1"
"nop side 0"
//"nop side 1"
//"nop side 0"
"nop side 1"
// read in y-1 bits
"lp2:"
@ -59,68 +68,62 @@ where
let relocated = RelocatedProgram::new(&program.program);
let mut pin_io = sm.make_pio_pin(dio);
pin_io.set_pull(Pull::Down);
let mut pin_io: embassy_rp::pio::Pin<PIO> = common.make_pio_pin(dio);
pin_io.set_pull(Pull::None);
pin_io.set_schmitt(true);
pin_io.set_input_sync_bypass(true);
//pin_io.set_drive_strength(Drive::_12mA);
//pin_io.set_slew_rate(SlewRate::Fast);
let mut pin_clk = sm.make_pio_pin(clk);
let mut pin_clk = common.make_pio_pin(clk);
pin_clk.set_drive_strength(Drive::_12mA);
pin_clk.set_slew_rate(SlewRate::Fast);
sm.write_instr(relocated.origin() as usize, relocated.code());
let mut cfg = Config::default();
cfg.use_program(&common.load_program(&relocated), &[&pin_clk]);
cfg.set_out_pins(&[&pin_io]);
cfg.set_in_pins(&[&pin_io]);
cfg.set_set_pins(&[&pin_io]);
cfg.shift_out.direction = ShiftDirection::Left;
cfg.shift_out.auto_fill = true;
//cfg.shift_out.threshold = 32;
cfg.shift_in.direction = ShiftDirection::Left;
cfg.shift_in.auto_fill = true;
//cfg.shift_in.threshold = 32;
// theoretical maximum according to data sheet, 100Mhz Pio => 50Mhz SPI Freq
sm.set_clkdiv(0x0140);
// seems to cause random corruption, probably due to jitter due to the fractional divider.
// cfg.clock_divider = FixedU32::from_bits(0x0140);
// same speed as pico-sdk, 62.5Mhz
// sm.set_clkdiv(0x0200);
cfg.clock_divider = FixedU32::from_bits(0x0200);
// 32 Mhz
// sm.set_clkdiv(0x03E8);
// cfg.clock_divider = FixedU32::from_bits(0x03E8);
// 16 Mhz
// sm.set_clkdiv(0x07d0);
// cfg.clock_divider = FixedU32::from_bits(0x07d0);
// 8Mhz
// sm.set_clkdiv(0x0a_00);
// cfg.clock_divider = FixedU32::from_bits(0x0a_00);
// 1Mhz
// sm.set_clkdiv(0x7d_00);
// cfg.clock_divider = FixedU32::from_bits(0x7d_00);
// slowest possible
// sm.set_clkdiv(0xffff_00);
// cfg.clock_divider = FixedU32::from_bits(0xffff_00);
sm.set_autopull(true);
// sm.set_pull_threshold(32);
sm.set_autopush(true);
// sm.set_push_threshold(32);
sm.set_config(&cfg);
sm.set_out_pins(&[&pin_io]);
sm.set_in_base_pin(&pin_io);
sm.set_set_pins(&[&pin_clk]);
pio_instr_util::set_pindir(&mut sm, 0b1);
sm.set_set_pins(&[&pin_io]);
pio_instr_util::set_pindir(&mut sm, 0b1);
sm.set_sideset_base_pin(&pin_clk);
sm.set_sideset_count(1);
sm.set_out_shift_dir(ShiftDirection::Left);
sm.set_in_shift_dir(ShiftDirection::Left);
let Wrap { source, target } = relocated.wrap();
sm.set_wrap(source, target);
// pull low for startup
pio_instr_util::set_pin(&mut sm, 0);
sm.set_pin_dirs(Direction::Out, &[&pin_clk, &pin_io]);
sm.set_pins(Level::Low, &[&pin_clk, &pin_io]);
Self {
cs,
sm,
dma,
wrap_target: target,
irq,
dma: dma.into_ref(),
wrap_target: relocated.wrap().target,
}
}
@ -132,18 +135,22 @@ where
#[cfg(feature = "defmt")]
defmt::trace!("write={} read={}", write_bits, read_bits);
let mut dma = Peripheral::into_ref(&mut self.dma);
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
pio_instr_util::set_pindir(&mut self.sm, 0b1);
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
unsafe {
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
pio_instr_util::set_pindir(&mut self.sm, 0b1);
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
}
self.sm.set_enable(true);
self.sm.dma_push(dma.reborrow(), write).await;
self.sm.tx().dma_push(self.dma.reborrow(), write).await;
let mut status = 0;
self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await;
self.sm
.rx()
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status))
.await;
status
}
@ -155,27 +162,32 @@ where
#[cfg(feature = "defmt")]
defmt::trace!("write={} read={}", write_bits, read_bits);
let mut dma = Peripheral::into_ref(&mut self.dma);
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
pio_instr_util::set_pindir(&mut self.sm, 0b1);
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
unsafe {
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
pio_instr_util::set_pindir(&mut self.sm, 0b1);
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
}
// self.cs.set_low();
self.sm.set_enable(true);
self.sm.dma_push(dma.reborrow(), slice::from_ref(&cmd)).await;
self.sm.dma_pull(dma.reborrow(), read).await;
self.sm.tx().dma_push(self.dma.reborrow(), slice::from_ref(&cmd)).await;
self.sm.rx().dma_pull(self.dma.reborrow(), read).await;
let mut status = 0;
self.sm.dma_pull(dma.reborrow(), slice::from_mut(&mut status)).await;
self.sm
.rx()
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status))
.await;
status
}
}
impl<CS, SM, DMA> SpiBusCyw43 for PioSpi<CS, SM, DMA>
impl<'d, CS, PIO, const SM: usize, DMA> SpiBusCyw43 for PioSpi<'d, CS, PIO, SM, DMA>
where
CS: Pin,
SM: PioStateMachine,
PIO: Instance,
DMA: Channel,
{
async fn cmd_write(&mut self, write: &[u32]) -> u32 {
@ -193,7 +205,6 @@ where
}
async fn wait_for_event(&mut self) {
self.sm.wait_irq(0).await;
self.sm.clear_irq(0);
self.irq.wait().await;
}
}