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#![macro_use]
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pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
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pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
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use core::marker::PhantomData;
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use core::marker::PhantomData;
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use embassy::interrupt::Interrupt;
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use embassy::interrupt::Interrupt;
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use embedded_hal::blocking::spi::Write;
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use embedded_hal::blocking::spi::{Write, Transfer};
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use crate::pac::spi
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//use crate::pac::spi;
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pub struct Spi<'d, T: Instance> {
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pub struct Spi<'d, T: Instance> {
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peri: T,
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peri: T,
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irq: T::Interrupt,
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//irq: T::Interrupt,
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phantom: PhantomData<&'d mut T>,
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phantom: PhantomData<&'d mut T>,
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}
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}
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pub enum Error {
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pub enum Error {
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Framing,
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Crc,
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Overrun,
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}
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}
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impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spim<'d, T> {
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impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T> {
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type Error = Error;
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type Error = Error;
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fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
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fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
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let mut recv: &mut [u8] = &mut [];
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let regs = T::regs();
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for word in words.iter() {
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while unsafe { !regs.sr().read().txe() } {
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// spin
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}
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unsafe {
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regs.dr().write(|reg| reg.0 = *word as u32);
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}
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loop {
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let sr = unsafe { regs.sr().read() };
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if sr.fre() {
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return Err(Error::Framing);
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}
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if sr.ovr() {
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return Err(Error::Overrun);
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}
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if sr.crcerr() {
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return Err(Error::Crc);
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}
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if !sr.txe() {
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// loop waiting for TXE
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}
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}
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}
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Ok(())
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}
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}
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}
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}
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mod sealed {
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impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T> {
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type Error = Error;
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fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
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let regs = T::regs();
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for word in words.iter_mut() {
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while unsafe { !regs.sr().read().txe() } {
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// spin
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}
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unsafe {
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regs.dr().write(|reg| reg.0 = *word as u32);
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}
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while unsafe { !regs.sr().read().rxne() } {
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// spin waiting for inbound to shift in.
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}
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*word = unsafe { regs.dr().read().0 as u8 };
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loop {
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let sr = unsafe { regs.sr().read() };
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if sr.fre() {
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return Err(Error::Framing);
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}
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if sr.ovr() {
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return Err(Error::Overrun);
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}
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if sr.crcerr() {
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return Err(Error::Crc);
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}
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if !sr.txe() {
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// loop waiting for TXE
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}
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}
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}
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Ok(words)
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}
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}
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pub(crate) mod sealed {
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use super::*;
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use super::*;
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use embassy::util::AtomicWaker;
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use embassy::util::AtomicWaker;
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pub struct State {
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//pub struct State {
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pub end_waker: AtomicWaker,
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//pub end_waker: AtomicWaker,
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}
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//}
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impl State {
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//impl State {
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pub const fn new() -> Self {
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//pub const fn new() -> Self {
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Self {
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//Self {
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end_waker: AtomicWaker::new(),
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//end_waker: AtomicWaker::new(),
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}
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//}
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}
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//}
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}
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//}
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pub trait Instance {
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pub trait Instance {
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fn regs() -> &'static crate::pac::spi::Spi;
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fn regs() -> &'static crate::pac::spi::Spi;
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fn state() -> &'static State;
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//fn state() -> &'static State;
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}
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}
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}
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}
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pub trait Instance: sealed::Instance + 'static {
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pub trait Instance: sealed::Instance + 'static {
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type Interrupt: Interrupt;
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//type Interrupt: Interrupt;
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}
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}
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macro_rules! impl_spi {
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macro_rules! impl_spi {
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($inst:ident) => {
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($inst:ident) => {
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impl crate::spi::sealed::Instance for peripherals::$inst {
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impl crate::spi::sealed::Instance for peripherals::$inst {
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fn regs() -> crate::pac::spi::Spi {
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fn regs() -> &'static crate::pac::spi::Spi {
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crate::pac::$inst
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&crate::pac::$inst
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}
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}
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}
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}
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