From 8fb380b18052c2393ae1dc3466bb87e9402181d8 Mon Sep 17 00:00:00 2001 From: Andres Hurtado Lopez Date: Sun, 26 Feb 2023 18:40:23 -0500 Subject: [PATCH] RP-PICO UART adding set_baudrate --- embassy-rp/src/uart/mod.rs | 50 +++++++++++++++++++++++++++----------- 1 file changed, 36 insertions(+), 14 deletions(-) diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index bbbf97c0..7540052b 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs @@ -296,7 +296,7 @@ impl<'d, T: Instance> Uart<'d, T, Async> { Some(rx_dma.map_into()), config, ) - } + } } impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { @@ -324,6 +324,25 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { } } + fn baudrate_calculations(baudrate: u32) -> (u32, u32) { + + let clk_base = crate::clocks::clk_peri_freq(); + + let baud_rate_div = (8 * clk_base) / baudrate; + let mut baud_ibrd = baud_rate_div >> 7; + let mut baud_fbrd = ((baud_rate_div & 0x7f) + 1) / 2; + + if baud_ibrd == 0 { + baud_ibrd = 1; + baud_fbrd = 0; + } else if baud_ibrd >= 65535 { + baud_ibrd = 65535; + baud_fbrd = 0; + } + + (baud_ibrd, baud_fbrd) + } + fn init( tx: Option>, rx: Option>, @@ -350,19 +369,7 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { pin.pad_ctrl().write(|w| w.set_ie(true)); } - let clk_base = crate::clocks::clk_peri_freq(); - - let baud_rate_div = (8 * clk_base) / config.baudrate; - let mut baud_ibrd = baud_rate_div >> 7; - let mut baud_fbrd = ((baud_rate_div & 0x7f) + 1) / 2; - - if baud_ibrd == 0 { - baud_ibrd = 1; - baud_fbrd = 0; - } else if baud_ibrd >= 65535 { - baud_ibrd = 65535; - baud_fbrd = 0; - } + let (baud_ibrd, baud_fbrd) = Uart::::baudrate_calculations(config.baudrate); // Load PL011's baud divisor registers r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd)); @@ -400,6 +407,21 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { }); } } + + pub fn set_baudrate(&mut self, baudrate: u32) { + + let r = T::regs(); + + let (baud_ibrd, baud_fbrd) = Self::baudrate_calculations(baudrate); + + unsafe { + + // Load PL011's baud divisor registers + r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd)); + r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd)); + } + + } } impl<'d, T: Instance, M: Mode> Uart<'d, T, M> {