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embassy-stm32/eth/v1a: configure pins correctly for f107

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v1a works correctly!
This commit is contained in:
David Lenfesty 2022-04-25 19:47:40 -06:00 committed by Dario Nieuwenhuis
parent 0d2ef1099b
commit 905b40e212
1 changed files with 21 additions and 9 deletions
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30
embassy-stm32/src/eth/v1a/mod.rs
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@ -42,13 +42,24 @@ pub struct Ethernet<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> {
mac_addr: [u8; 6], mac_addr: [u8; 6],
} }
macro_rules! config_pins { macro_rules! config_in_pins {
($($pin:ident),*) => { ($($pin:ident),*) => {
// NOTE(unsafe) Exclusive access to the registers // NOTE(unsafe) Exclusive access to the registers
critical_section::with(|_| { critical_section::with(|_| {
$( $(
// TODO double check to ensure speed set *isn't required. This call *seems* to set // TODO properly create a set_as_input function
// GPIO to max speed. $pin.set_as_af($pin.af_num(), AFType::Input);
)*
})
}
}
macro_rules! config_af_pins {
($($pin:ident),*) => {
// NOTE(unsafe) Exclusive access to the registers
critical_section::with(|_| {
$(
// We are lucky here, this configures to max speed (50MHz)
$pin.set_as_af($pin.af_num(), AFType::OutputPushPull); $pin.set_as_af($pin.af_num(), AFType::OutputPushPull);
)* )*
}) })
@ -80,19 +91,20 @@ impl<'d, T: Instance, P: PHY, const TX: usize, const RX: usize> Ethernet<'d, T,
// NOTE(unsafe) We have exclusive access to the registers // NOTE(unsafe) We have exclusive access to the registers
critical_section::with(|_| { critical_section::with(|_| {
RCC.apb2enr().modify(|w| w.set_afioen(true)); RCC.apb2enr().modify(|w| w.set_afioen(true));
// Select RMII (Reduced Media Independent Interface)
// Must be done prior to enabling peripheral clock
AFIO.mapr().modify(|w| w.set_mii_rmii_sel(true));
RCC.ahbenr().modify(|w| { RCC.ahbenr().modify(|w| {
w.set_ethmacen(true); w.set_ethmacen(true);
w.set_ethmactxen(true); w.set_ethmactxen(true);
w.set_ethmacrxen(true); w.set_ethmacrxen(true);
}); });
// Select RMII (Reduced Media Independent Interface)
AFIO.mapr().modify(|w| w.set_mii_rmii_sel(true));
// TODO set MCO to eth clk
}); });
config_pins!(ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en); config_in_pins!(ref_clk, rx_d0, rx_d1);
config_af_pins!(mdio, mdc, tx_d0, tx_d1, tx_en);
// NOTE(unsafe) We are ourselves not leak-safe. // NOTE(unsafe) We are ourselves not leak-safe.
let state = PeripheralMutex::new_unchecked(interrupt, &mut state.0, || Inner::new(peri)); let state = PeripheralMutex::new_unchecked(interrupt, &mut state.0, || Inner::new(peri));