Merge pull request #1813 from diondokter/stm32-brr-u32
Modified the STM Uart baud calculation to be fully 32-bit
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commit
906ab06a6e
@ -809,45 +809,57 @@ fn configure(r: Regs, config: &Config, pclk_freq: Hertz, kind: Kind, enable_rx:
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Kind::Uart => (1, 0x10, 0x1_0000),
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Kind::Uart => (1, 0x10, 0x1_0000),
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};
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};
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fn calculate_brr(baud: u32, pclk: u32, presc: u32, mul: u32) -> u32 {
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// The calculation to be done to get the BRR is `mul * pclk / presc / baud`
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// To do this in 32-bit only we can't multiply `mul` and `pclk`
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let clock = pclk / presc;
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// The mul is applied as the last operation to prevent overflow
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let brr = clock / baud * mul;
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// The BRR calculation will be a bit off because of integer rounding.
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// Because we multiplied our inaccuracy with mul, our rounding now needs to be in proportion to mul.
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let rounding = ((clock % baud) * mul + (baud / 2)) / baud;
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brr + rounding
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}
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#[cfg(not(usart_v1))]
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#[cfg(not(usart_v1))]
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let mut over8 = false;
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let mut over8 = false;
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let mut found = None;
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let mut found_brr = None;
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for &(presc, _presc_val) in &DIVS {
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for &(presc, _presc_val) in &DIVS {
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let denom = (config.baudrate * presc as u32) as u64;
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let brr = calculate_brr(config.baudrate, pclk_freq.0, presc as u32, mul);
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let div = (pclk_freq.0 as u64 * mul + (denom / 2)) / denom;
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trace!(
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trace!(
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"USART: presc={}, div=0x{:08x} (mantissa = {}, fraction = {})",
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"USART: presc={}, div=0x{:08x} (mantissa = {}, fraction = {})",
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presc,
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presc,
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div,
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brr,
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div >> 4,
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brr >> 4,
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div & 0x0F
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brr & 0x0F
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);
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);
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if div < brr_min {
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if brr < brr_min {
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#[cfg(not(usart_v1))]
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#[cfg(not(usart_v1))]
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if div * 2 >= brr_min && kind == Kind::Uart && !cfg!(usart_v1) {
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if brr * 2 >= brr_min && kind == Kind::Uart && !cfg!(usart_v1) {
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over8 = true;
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over8 = true;
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let div = div as u32;
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r.brr().write_value(regs::Brr(((brr << 1) & !0xF) | (brr & 0x07)));
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r.brr().write_value(regs::Brr(((div << 1) & !0xF) | (div & 0x07)));
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#[cfg(usart_v4)]
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#[cfg(usart_v4)]
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r.presc().write(|w| w.set_prescaler(_presc_val));
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r.presc().write(|w| w.set_prescaler(_presc_val));
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found = Some(div);
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found_brr = Some(brr);
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break;
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break;
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}
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}
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panic!("USART: baudrate too high");
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panic!("USART: baudrate too high");
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}
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}
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if div < brr_max {
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if brr < brr_max {
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let div = div as u32;
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r.brr().write_value(regs::Brr(brr));
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r.brr().write_value(regs::Brr(div));
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#[cfg(usart_v4)]
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#[cfg(usart_v4)]
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r.presc().write(|w| w.set_prescaler(_presc_val));
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r.presc().write(|w| w.set_prescaler(_presc_val));
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found = Some(div);
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found_brr = Some(brr);
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break;
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break;
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}
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}
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}
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}
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let div = found.expect("USART: baudrate too low");
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let brr = found_brr.expect("USART: baudrate too low");
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#[cfg(not(usart_v1))]
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#[cfg(not(usart_v1))]
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let oversampling = if over8 { "8 bit" } else { "16 bit" };
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let oversampling = if over8 { "8 bit" } else { "16 bit" };
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@ -857,7 +869,7 @@ fn configure(r: Regs, config: &Config, pclk_freq: Hertz, kind: Kind, enable_rx:
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"Using {} oversampling, desired baudrate: {}, actual baudrate: {}",
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"Using {} oversampling, desired baudrate: {}, actual baudrate: {}",
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oversampling,
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oversampling,
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config.baudrate,
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config.baudrate,
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(pclk_freq.0 * mul as u32) / div
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pclk_freq.0 / brr * mul
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);
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);
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r.cr2().write(|w| {
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r.cr2().write(|w| {
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