Change interrupt modify into write
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9f870a5edf
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@ -65,7 +65,7 @@ impl<'d> Adc<'d> {
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irq.disable();
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irq.set_handler(|_| unsafe {
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let r = Self::regs();
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r.inte().modify(|w| w.set_fifo(false));
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r.inte().write(|w| w.set_fifo(false));
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WAKER.wake();
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});
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irq.unpend();
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@ -77,7 +77,7 @@ impl<'d> Adc<'d> {
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async fn wait_for_ready() {
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let r = Self::regs();
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unsafe {
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r.inte().modify(|w| w.set_fifo(true));
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r.inte().write(|w| w.set_fifo(true));
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compiler_fence(Ordering::SeqCst);
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poll_fn(|cx| {
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WAKER.register(cx.waker());
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