Added i2c_master test case in examples
This commit is contained in:
anton smeenk
parent
575db17264
commit
9424379268
@ -10,7 +10,6 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["
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embassy-sync = { version = "0.3.0", path = "../../embassy-sync", features = ["defmt"] }
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embassy-executor = { version = "0.3.0", path = "../../embassy-executor", features = ["nightly", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
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embassy-time = { version = "0.1.4", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
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defmt = "0.3"
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defmt-rtt = "0.4"
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43
examples/stm32g0/Embed.toml
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43
examples/stm32g0/Embed.toml
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@ -0,0 +1,43 @@
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[default.probe]
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protocol = "Swd"
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# USB vendor ID
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# usb_vid = "6790"
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# USB product ID
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# usb_pid = "29987"
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[default.flashing]
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enabled = true
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[default.reset]
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# Whether or not the target should be reset.
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# When flashing is enabled as well, the target will be reset after flashing.
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enabled = true
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# Whether or not the target should be halted after reset.
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halt_afterwards = false
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[default.general]
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# The chip name of the chip to be debugged.
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#chip = "STM32G030J6Mx"
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chip = "STM32G070CBTx"
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# A list of chip descriptions to be loaded during runtime.
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chip_descriptions = []
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# The default log level to be used.
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log_level = "Warn"
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[default.rtt]
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enabled = false
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# A list of channel associations to be displayed. If left empty, all channels are displayed.
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channels = [
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# { up = 0, down = 0, name = "name" }
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]
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# The duration in ms for which the logger should retry to attach to RTT.
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timeout = 3000
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# Whether timestamps in the RTTUI are enabled
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show_timestamps = true
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[default.gdb]
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# Whether or not a GDB server should be opened after flashing.
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# This is exclusive and cannot be used with RTT at the moment.
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enabled = false
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# The connection string in host:port format wher the GDB server will open a socket.
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# gdb_connection_string
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227
examples/stm32g0/src/bin/i2c_master.rs
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227
examples/stm32g0/src/bin/i2c_master.rs
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@ -0,0 +1,227 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use core::fmt::{self, Write};
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use embassy_executor::Spawner;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::i2c::{Error, I2c};
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use embassy_stm32::time::Hertz;
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use embassy_stm32::usart::UartTx;
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use embassy_stm32::{bind_interrupts, i2c, peripherals, usart};
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use embassy_time::{Duration, Timer};
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use {defmt_rtt as _, panic_probe as _};
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bind_interrupts!(struct Irqs {
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I2C1 => i2c::InterruptHandler<peripherals::I2C1>;
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USART1 => usart::InterruptHandler<peripherals::USART1>;
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});
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pub struct SerialWriter {
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tx: UartTx<'static, peripherals::USART1, peripherals::DMA1_CH1>,
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}
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impl SerialWriter {
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pub fn new(tx: UartTx<'static, peripherals::USART1, peripherals::DMA1_CH1>) -> Self {
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SerialWriter { tx }
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}
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}
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impl fmt::Write for SerialWriter {
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fn write_str(&mut self, s: &str) -> fmt::Result {
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_ = self.tx.blocking_write(s.as_bytes());
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Ok(())
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}
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}
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let p = embassy_stm32::init(Default::default());
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let uart = usart::Uart::new(
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p.USART1,
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p.PB7,
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p.PB6,
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Irqs,
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p.DMA1_CH1,
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p.DMA1_CH2,
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usart::Config::default(),
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)
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.unwrap();
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let (tx, _rx) = uart.split();
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let mut writer = SerialWriter::new(tx);
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writeln!(
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&mut writer,
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"I2c test. Master role. Connect another device in slave role to the bus."
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)
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.unwrap();
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let mut i2c = I2c::new(
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p.I2C1,
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p.PB8,
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p.PB9,
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Irqs,
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NoDma,
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NoDma,
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Hertz(100_000),
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Default::default(),
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);
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Timer::after(Duration::from_millis(1000)).await;
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// start of the acutal test
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let mut counter = 0;
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loop {
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counter += 1;
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writeln!(&mut writer, "Loop counter: {:?}", counter).unwrap();
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let mut buf_long: [u8; 50] = [0; 50];
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let mut buf_short: [u8; 20] = [0; 20];
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let mut buf_rcv: [u8; 20] = [0; 20];
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let mut buf_10: [u8; 10] = [0; 10];
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let mut buf_io = [0_u8; 1];
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writeln!(&mut writer, "Start of test").unwrap();
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for i in 0..buf_short.len() {
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buf_short[i] = 0x41 + (i as u8)
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}
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// test 1: slave address 0x61 should not be addressable
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match i2c.blocking_write(0x61, &buf_short) {
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Ok(_) => writeln!(&mut writer, "Test 1 Error: would expect nack").unwrap(),
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 1 OK: expected NACK error: {:?}", err).unwrap(),
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};
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// 0x41 good case master write slave read: master does send 20 bytes slave receives 20 bytes
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match i2c.blocking_write(0x41, &buf_short) {
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Ok(_) => writeln!(&mut writer, "Test 0x41 Ok").unwrap(),
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x41 Error: {:?}", err).unwrap(),
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};
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// 0x42 bad case master write slave read: master does send less than 20 bytes
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for i in 0..buf_10.len() {
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buf_10[i] = 0x20 + (i as u8)
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}
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match i2c.blocking_write(0x42, &buf_10) {
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Ok(_) => writeln!(
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&mut writer,
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"Test 0x42 Ok. (Master cannot detect that frame is too short) "
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)
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.unwrap(),
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x42 error IncorrectFramesize: {:?}", err).unwrap(),
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};
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// 0x43 bad case master write slave read: master does send more than 20 bytes, slave does NACK
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for i in 0..buf_long.len() {
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buf_long[i] = 0x61 + (i as u8)
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}
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match i2c.blocking_write(0x43, &buf_long) {
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Ok(_) => writeln!(&mut writer, "Test 0x43 not ok expected error IncorrectFramesize: ").unwrap(),
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x43 Ok Expected IncorrectFrameSize: {:?}", err).unwrap(),
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};
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// 0x44 master write_read good case: master sends and expects 20 bytes
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for i in 0..buf_short.len() {
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buf_short[i] = 0x41 + (i as u8)
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}
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for i in 0..buf_rcv.len() {
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buf_rcv[i] = 0x30 + (i as u8)
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}
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match i2c.blocking_write_read(0x44, &buf_short, &mut buf_rcv) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x44 Ok ").unwrap();
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writeln!(
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&mut writer,
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"Uppercase input should be transformed to lowercase, A -> b "
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)
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.unwrap();
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for i in 0..buf_rcv.len() {
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writeln!(&mut writer, "{}", buf_rcv[i]).unwrap();
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}
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writeln!(&mut writer, "").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x44 error: {:?}", err).unwrap(),
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};
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// 0x48 master read slave write good case: exact 20 characters
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for i in 0..buf_short.len() {
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buf_short[i] = 0x61 + (i as u8)
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}
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match i2c.blocking_read(0x48, &mut buf_short) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x48 Ok ").unwrap();
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for i in 0..buf_short.len() {
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writeln!(&mut writer, "{}", buf_short[i]).unwrap();
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}
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writeln!(&mut writer, "").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x48 unexpected error: {:?}", err).unwrap(),
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};
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// 0x49 master read slave write bad case: master expects 50 slave does send 20 characters
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for i in 0..buf_long.len() {
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buf_long[i] = 0x61 + (i as u8)
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}
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match i2c.blocking_read(0x49, &mut buf_long) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x49 Ok ").unwrap();
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for i in 0..buf_long.len() {
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writeln!(&mut writer, "{}", buf_long[i]).unwrap();
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}
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writeln!(&mut writer, "").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x49 error: {:?}", err).unwrap(),
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};
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// 0x4A master read slave write bad case: master expects 20 does slave does send 50 characters
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for i in 0..buf_short.len() {
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buf_short[i] = 0x41 + (i as u8)
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}
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match i2c.blocking_read(0x4A, &mut buf_short) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x4A Ok ").unwrap();
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for i in 0..buf_short.len() {
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writeln!(&mut writer, "{}", buf_short[i]).unwrap();
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}
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writeln!(&mut writer, "").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x4A error: {:?}", err).unwrap(),
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};
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// 0x4F test end and slave will present results
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let mut result: [u8; 2] = [0, 0];
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match i2c.blocking_read(0x4F, &mut result) {
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Ok(_) => writeln!(
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&mut writer,
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"Result of the whole test as reported by the slave count/errors: {}/{}\r",
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result[0], result[1]
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)
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.unwrap(),
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x4F unexpected error: {:?}", err).unwrap(),
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};
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writeln!(&mut writer, "").unwrap();
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let mut joyb = [0_u8; 3];
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match i2c.blocking_read(0x52, &mut joyb) {
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Ok(_) => {
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writeln!(&mut writer, "Test 0x52 Ok ").unwrap();
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for i in 0..joyb.len() {
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writeln!(&mut writer, " {} ", joyb[i]).unwrap();
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}
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writeln!(&mut writer, "").unwrap()
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}
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x52 unexpected error: {:?}", err).unwrap(),
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};
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match i2c.blocking_write(0x21, &mut buf_io) {
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Ok(_) => (),
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Err(Error::Timeout) => writeln!(&mut writer, "Operation timed out").unwrap(),
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Err(err) => writeln!(&mut writer, "Test 0x21 unexpected error: {:?}", err).unwrap(),
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};
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buf_io[0] += 1;
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Timer::after(Duration::from_millis(10_000)).await;
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}
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}
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