Merge #655
655: common/serial/usb: fix hang when write buffer gets full and then the bus resets. r=Dirbaio a=Dirbaio Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
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commit
9735c38592
@ -167,6 +167,7 @@ impl<'bus, 'a, B: UsbBus> AsyncWrite for UsbSerial<'bus, 'a, B> {
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let write_buf = this.write_buf.push_buf();
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let write_buf = this.write_buf.push_buf();
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if write_buf.is_empty() {
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if write_buf.is_empty() {
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trace!("buf full, registering waker");
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this.write_waker.register(cx.waker());
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this.write_waker.register(cx.waker());
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return Poll::Pending;
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return Poll::Pending;
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}
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}
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@ -244,10 +245,18 @@ impl<'bus, 'a, B: UsbBus> UsbSerial<'bus, 'a, B> {
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};
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};
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if !buf.is_empty() {
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if !buf.is_empty() {
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trace!("writing packet len {}", buf.len());
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let count = match self.inner.write_packet(buf) {
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let count = match self.inner.write_packet(buf) {
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Ok(c) => c,
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Ok(c) => {
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Err(UsbError::WouldBlock) => 0,
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trace!("write packet: OK {}", c);
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c
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}
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Err(UsbError::WouldBlock) => {
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trace!("write packet: WouldBlock");
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0
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}
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Err(_) => {
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Err(_) => {
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trace!("write packet: error");
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self.write_error = true;
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self.write_error = true;
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return;
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return;
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}
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}
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@ -260,11 +269,20 @@ impl<'bus, 'a, B: UsbBus> UsbSerial<'bus, 'a, B> {
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}
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}
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self.write_buf.pop(count);
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self.write_buf.pop(count);
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} else if full_size_packets > 0 {
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} else if full_size_packets > 0 {
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if let Err(e) = self.inner.write_packet(&[]) {
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trace!("writing empty packet");
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if !matches!(e, UsbError::WouldBlock) {
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match self.inner.write_packet(&[]) {
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self.write_error = true;
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Ok(_) => {
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trace!("write empty packet: OK");
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}
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Err(UsbError::WouldBlock) => {
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trace!("write empty packet: WouldBlock");
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return;
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}
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Err(_) => {
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trace!("write empty packet: Error");
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self.write_error = true;
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return;
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}
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}
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return;
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}
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}
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self.write_state = WriteState::Idle;
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self.write_state = WriteState::Idle;
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}
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}
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@ -284,10 +302,14 @@ where
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self.read_buf.clear();
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self.read_buf.clear();
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self.write_buf.clear();
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self.write_buf.clear();
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self.write_state = WriteState::Idle;
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self.write_state = WriteState::Idle;
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self.read_waker.wake();
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self.write_waker.wake();
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}
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}
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fn endpoint_in_complete(&mut self, addr: EndpointAddress) {
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fn endpoint_in_complete(&mut self, addr: EndpointAddress) {
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trace!("DONE endpoint_in_complete");
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if addr == self.inner.write_ep_address() {
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if addr == self.inner.write_ep_address() {
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trace!("DONE writing packet, waking");
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self.write_waker.wake();
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self.write_waker.wake();
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self.flush_write();
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self.flush_write();
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