From 99dd2a9386c83f4e625f4c849c8b5e519e12a87c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Henrik=20Alse=CC=81r?= <henrik.alser@me.com>
Date: Tue, 30 Aug 2022 22:55:53 +0200
Subject: [PATCH] Reorder args

---
 embassy-rp/src/spi.rs            | 4 ++--
 examples/rp/src/bin/spi_async.rs | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs
index 11aad630..6f68777b 100644
--- a/embassy-rp/src/spi.rs
+++ b/embassy-rp/src/spi.rs
@@ -264,11 +264,11 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
 impl<'d, T: Instance> Spi<'d, T, Async> {
     pub fn new(
         inner: impl Peripheral<P = T> + 'd,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
-        rx_dma: impl Peripheral<P = impl Channel> + 'd,
         clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
         mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
         miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
+        tx_dma: impl Peripheral<P = impl Channel> + 'd,
+        rx_dma: impl Peripheral<P = impl Channel> + 'd,
         config: Config,
     ) -> Self {
         into_ref!(tx_dma, rx_dma, clk, mosi, miso);
diff --git a/examples/rp/src/bin/spi_async.rs b/examples/rp/src/bin/spi_async.rs
index 359ad50e..b2df0dd1 100644
--- a/examples/rp/src/bin/spi_async.rs
+++ b/examples/rp/src/bin/spi_async.rs
@@ -17,7 +17,7 @@ async fn main(_spawner: Spawner) {
     let mosi = p.PIN_11;
     let clk = p.PIN_10;
 
-    let mut spi: Spi<'_, _, Async> = Spi::new(p.SPI1, p.DMA_CH0, p.DMA_CH1, clk, mosi, miso, Config::default());
+    let mut spi: Spi<'_, _, Async> = Spi::new(p.SPI1, clk, mosi, miso, p.DMA_CH0, p.DMA_CH1, Config::default());
 
     loop {
         let tx_buf = [1_u8, 2, 3, 4, 5, 6];