stm32: Add support for read_until_idle on UART
This commit is contained in:
committed by
Dario Nieuwenhuis
parent
ff76fde299
commit
9cac649fcf
@ -46,16 +46,44 @@ impl<'d, T: BasicInstance> Unpin for BufferedUart<'d, T> {}
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impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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pub fn new(
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state: &'d mut State<'d, T>,
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_uart: Uart<'d, T, NoDma, NoDma>,
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_peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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config: Config,
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) -> BufferedUart<'d, T> {
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into_ref!(irq);
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into_ref!(_peri, rx, tx, irq);
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T::enable();
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T::reset();
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let r = T::regs();
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configure(r, &config, T::frequency(), T::MULTIPLIER);
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unsafe {
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r.cr1().modify(|w| {
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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r.cr2().write(|_w| {});
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r.cr3().write(|_w| {});
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r.cr1().write(|w| {
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w.set_ue(true);
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w.set_te(true);
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w.set_re(true);
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w.set_m0(if config.parity != Parity::ParityNone {
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vals::M0::BIT9
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} else {
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vals::M0::BIT8
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});
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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w.set_rxneie(true);
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w.set_idleie(true);
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});
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