stm32: Add support for read_until_idle on UART
This commit is contained in:
committed by
Dario Nieuwenhuis
parent
ff76fde299
commit
9cac649fcf
@ -7,6 +7,7 @@ mod example_common;
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use defmt::assert_eq;
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use embassy_executor::Spawner;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::interrupt;
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use embassy_stm32::usart::{Config, Uart};
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use example_common::*;
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@ -18,22 +19,22 @@ async fn main(_spawner: Spawner) {
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// Arduino pins D0 and D1
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// They're connected together with a 1K resistor.
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#[cfg(feature = "stm32f103c8")]
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let (tx, rx, usart) = (p.PA9, p.PA10, p.USART1);
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let (tx, rx, usart, irq) = (p.PA9, p.PA10, p.USART1, interrupt::take!(USART1));
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#[cfg(feature = "stm32g491re")]
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let (tx, rx, usart) = (p.PC4, p.PC5, p.USART1);
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let (tx, rx, usart, irq) = (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1));
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#[cfg(feature = "stm32g071rb")]
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let (tx, rx, usart) = (p.PC4, p.PC5, p.USART1);
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let (tx, rx, usart, irq) = (p.PC4, p.PC5, p.USART1, interrupt::take!(USART1));
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#[cfg(feature = "stm32f429zi")]
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let (tx, rx, usart) = (p.PG14, p.PG9, p.USART6);
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let (tx, rx, usart, irq) = (p.PG14, p.PG9, p.USART6, interrupt::take!(USART6));
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#[cfg(feature = "stm32wb55rg")]
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let (tx, rx, usart) = (p.PA2, p.PA3, p.LPUART1);
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let (tx, rx, usart, irq) = (p.PA2, p.PA3, p.LPUART1, interrupt::take!(LPUART1));
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#[cfg(feature = "stm32h755zi")]
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let (tx, rx, usart) = (p.PB6, p.PB7, p.USART1);
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let (tx, rx, usart, irq) = (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1));
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#[cfg(feature = "stm32u585ai")]
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let (tx, rx, usart) = (p.PD8, p.PD9, p.USART3);
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let (tx, rx, usart, irq) = (p.PD8, p.PD9, p.USART3, interrupt::take!(USART3));
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let config = Config::default();
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let mut usart = Uart::new(usart, rx, tx, NoDma, NoDma, config);
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let mut usart = Uart::new(usart, rx, tx, irq, NoDma, NoDma, config);
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// We can't send too many bytes, they have to fit in the FIFO.
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// This is because we aren't sending+receiving at the same time.
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@ -6,6 +6,7 @@
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mod example_common;
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use defmt::assert_eq;
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use embassy_executor::Spawner;
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use embassy_stm32::interrupt;
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use embassy_stm32::usart::{Config, Uart};
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use example_common::*;
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@ -17,22 +18,53 @@ async fn main(_spawner: Spawner) {
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// Arduino pins D0 and D1
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// They're connected together with a 1K resistor.
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#[cfg(feature = "stm32f103c8")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (
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p.PA9,
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p.PA10,
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p.USART1,
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interrupt::take!(USART1),
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p.DMA1_CH4,
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p.DMA1_CH5,
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);
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#[cfg(feature = "stm32g491re")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
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let (tx, rx, usart, irq, tx_dma, rx_dma) =
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(p.PC4, p.PC5, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
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#[cfg(feature = "stm32g071rb")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
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let (tx, rx, usart, irq, tx_dma, rx_dma) =
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(p.PC4, p.PC5, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
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#[cfg(feature = "stm32f429zi")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (
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p.PG14,
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p.PG9,
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p.USART6,
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interrupt::take!(USART6),
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p.DMA2_CH6,
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p.DMA2_CH1,
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);
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#[cfg(feature = "stm32wb55rg")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (
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p.PA2,
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p.PA3,
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p.LPUART1,
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interrupt::take!(LPUART1),
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p.DMA1_CH1,
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p.DMA1_CH2,
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);
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#[cfg(feature = "stm32h755zi")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
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let (tx, rx, usart, irq, tx_dma, rx_dma) =
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(p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH0, p.DMA1_CH1);
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#[cfg(feature = "stm32u585ai")]
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let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
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let (tx, rx, usart, irq, tx_dma, rx_dma) = (
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p.PD8,
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p.PD9,
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p.USART3,
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interrupt::take!(USART3),
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p.GPDMA1_CH0,
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p.GPDMA1_CH1,
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);
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let config = Config::default();
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let mut usart = Uart::new(usart, rx, tx, tx_dma, rx_dma, config);
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let mut usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
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// We can't send too many bytes, they have to fit in the FIFO.
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// This is because we aren't sending+receiving at the same time.
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