SImplify rtc overflow handling
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@ -8,10 +8,26 @@ use crate::interrupt;
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use crate::interrupt::{CriticalSection, Mutex, OwnedInterrupt};
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use crate::interrupt::{CriticalSection, Mutex, OwnedInterrupt};
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use crate::pac::rtc0;
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use crate::pac::rtc0;
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// RTC timekeeping works with something we call "periods", which are time intervals
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// of 2^23 ticks. The RTC counter value is 24 bits, so one "overflow cycle" is 2 periods.
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//
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// A `period` count is maintained in parallel to the RTC hardware `counter`, like this:
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// - `period` and `counter` start at 0
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// - `period` is incremented on overflow (at counter value 0)
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// - `period` is incremented "midway" between overflows (at counter value 0x800000)
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//
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// Therefore, when `period` is even, counter is in 0..0x7fffff. When odd, counter is in 0x800000..0xFFFFFF
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// This allows for now() to return the correct value even if it races an overflow.
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//
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// To get `now()`, `period` is read first, then `counter` is read. If the counter value matches
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// the expected range for the `period` parity, we're done. If it doesn't, this means that
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// a new period start has raced us between reading `period` and `counter`, so we assume the `counter` value
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// corresponds to the next period.
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//
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// `period` is a 32bit integer, so It overflows on 2^32 * 2^23 / 32768 seconds of uptime, which is 34865 years.
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fn calc_now(period: u32, counter: u32) -> u64 {
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fn calc_now(period: u32, counter: u32) -> u64 {
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let shift = ((period & 1) << 23) + 0x400000;
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((period as u64) << 23) + ((counter ^ ((period & 1) << 23)) as u64)
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let counter_shifted = (counter + shift) & 0xFFFFFF;
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((period as u64) << 23) + counter_shifted as u64 - 0x400000
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}
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}
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fn compare_n(n: usize) -> u32 {
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fn compare_n(n: usize) -> u32 {
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@ -27,12 +43,12 @@ mod test {
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assert_eq!(calc_now(0, 0x000000), 0x0_000000);
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assert_eq!(calc_now(0, 0x000000), 0x0_000000);
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assert_eq!(calc_now(0, 0x000001), 0x0_000001);
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assert_eq!(calc_now(0, 0x000001), 0x0_000001);
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assert_eq!(calc_now(0, 0x7FFFFF), 0x0_7FFFFF);
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assert_eq!(calc_now(0, 0x7FFFFF), 0x0_7FFFFF);
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assert_eq!(calc_now(1, 0x7FFFFF), 0x0_7FFFFF);
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assert_eq!(calc_now(1, 0x7FFFFF), 0x1_7FFFFF);
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assert_eq!(calc_now(0, 0x800000), 0x0_800000);
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assert_eq!(calc_now(0, 0x800000), 0x0_800000);
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assert_eq!(calc_now(1, 0x800000), 0x0_800000);
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assert_eq!(calc_now(1, 0x800000), 0x0_800000);
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assert_eq!(calc_now(1, 0x800001), 0x0_800001);
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assert_eq!(calc_now(1, 0x800001), 0x0_800001);
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assert_eq!(calc_now(1, 0xFFFFFF), 0x0_FFFFFF);
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assert_eq!(calc_now(1, 0xFFFFFF), 0x0_FFFFFF);
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assert_eq!(calc_now(2, 0xFFFFFF), 0x0_FFFFFF);
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assert_eq!(calc_now(2, 0xFFFFFF), 0x1_FFFFFF);
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assert_eq!(calc_now(1, 0x000000), 0x1_000000);
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assert_eq!(calc_now(1, 0x000000), 0x1_000000);
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assert_eq!(calc_now(2, 0x000000), 0x1_000000);
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assert_eq!(calc_now(2, 0x000000), 0x1_000000);
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}
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}
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@ -59,15 +75,6 @@ pub struct RTC<T: Instance> {
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irq: T::Interrupt,
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irq: T::Interrupt,
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/// Number of 2^23 periods elapsed since boot.
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/// Number of 2^23 periods elapsed since boot.
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///
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/// This is incremented by 1
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/// - on overflow (counter value 0)
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/// - on "midway" between overflows (at counter value 0x800000)
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///
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/// Therefore: When even, counter is in 0..0x7fffff. When odd, counter is in 0x800000..0xFFFFFF
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/// This allows for now() to return the correct value even if it races an overflow.
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///
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/// It overflows on 2^32 * 2^23 / 32768 seconds of uptime, which is 34865 years.
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period: AtomicU32,
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period: AtomicU32,
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/// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled.
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/// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled.
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@ -177,21 +184,34 @@ impl<T: Instance> RTC<T> {
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alarm.timestamp.set(timestamp);
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alarm.timestamp.set(timestamp);
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let t = self.now();
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let t = self.now();
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// If alarm timestamp has passed, trigger it instantly.
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if timestamp <= t {
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if timestamp <= t {
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self.trigger_alarm(n, cs);
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self.trigger_alarm(n, cs);
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return;
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return;
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}
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}
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// If it hasn't triggered yet, setup it in the compare channel.
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let diff = timestamp - t;
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let diff = timestamp - t;
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if diff < 0xc00000 {
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if diff < 0xc00000 {
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// nrf52 docs say:
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// nrf52 docs say:
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// If the COUNTER is N, writing N or N+1 to a CC register may not trigger a COMPARE event.
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// If the COUNTER is N, writing N or N+1 to a CC register may not trigger a COMPARE event.
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// To workaround this, we never write a timestamp smaller than N+3.
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// To workaround this, we never write a timestamp smaller than N+3.
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// N+2 is not safe because rtc can tick from N to N+1 between calling now() and writing cc.
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// N+2 is not safe because rtc can tick from N to N+1 between calling now() and writing cc.
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//
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// It is impossible for rtc to tick more than once because
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// - this code takes less time than 1 tick
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// - it runs with interrupts disabled so nothing else can preempt it.
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//
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// This means that an alarm can be delayed for up to 2 ticks (from t+1 to t+3), but this is allowed
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// by the Alarm trait contract. What's not allowed is triggering alarms *before* their scheduled time,
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// and we don't do that here.
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let safe_timestamp = timestamp.max(t + 3);
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let safe_timestamp = timestamp.max(t + 3);
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self.rtc.cc[n].write(|w| unsafe { w.bits(safe_timestamp as u32 & 0xFFFFFF) });
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self.rtc.cc[n].write(|w| unsafe { w.bits(safe_timestamp as u32 & 0xFFFFFF) });
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self.rtc.intenset.write(|w| unsafe { w.bits(compare_n(n)) });
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self.rtc.intenset.write(|w| unsafe { w.bits(compare_n(n)) });
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} else {
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} else {
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// If it's too far in the future, don't setup the compare channel yet.
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// It will be setup later by `next_period`.
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self.rtc.intenclr.write(|w| unsafe { w.bits(compare_n(n)) });
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self.rtc.intenclr.write(|w| unsafe { w.bits(compare_n(n)) });
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}
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}
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})
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})
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@ -210,8 +230,9 @@ impl<T: Instance> RTC<T> {
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impl<T: Instance> embassy::time::Clock for RTC<T> {
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impl<T: Instance> embassy::time::Clock for RTC<T> {
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fn now(&self) -> u64 {
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fn now(&self) -> u64 {
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let counter = self.rtc.counter.read().bits();
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// `period` MUST be read before `counter`, see comment at the top for details.
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let period = self.period.load(Ordering::Relaxed);
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let period = self.period.load(Ordering::Relaxed);
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let counter = self.rtc.counter.read().bits();
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calc_now(period, counter)
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calc_now(period, counter)
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}
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}
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}
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}
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