Rename XXBusDevice to XXDevice.
This commit is contained in:
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4dc800710d
commit
a3a40bad6c
@ -3,7 +3,7 @@
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//! # Example (nrf52)
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//! # Example (nrf52)
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//!
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//!
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//! ```rust
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//! ```rust
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//! use embassy_embedded_hal::shared_bus::i2c::I2cBusDevice;
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//! use embassy_embedded_hal::shared_bus::i2c::I2cDevice;
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//! use embassy::mutex::Mutex;
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//! use embassy::mutex::Mutex;
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//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
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//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
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//!
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//!
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@ -15,11 +15,11 @@
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//! let i2c_bus = I2C_BUS.put(i2c_bus);
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//! let i2c_bus = I2C_BUS.put(i2c_bus);
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//!
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//!
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//! // Device 1, using embedded-hal-async compatible driver for QMC5883L compass
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//! // Device 1, using embedded-hal-async compatible driver for QMC5883L compass
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//! let i2c_dev1 = I2cBusDevice::new(i2c_bus);
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//! let i2c_dev1 = I2cDevice::new(i2c_bus);
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//! let compass = QMC5883L::new(i2c_dev1).await.unwrap();
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//! let compass = QMC5883L::new(i2c_dev1).await.unwrap();
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//!
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//!
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//! // Device 2, using embedded-hal-async compatible driver for Mpu6050 accelerometer
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//! // Device 2, using embedded-hal-async compatible driver for Mpu6050 accelerometer
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//! let i2c_dev2 = I2cBusDevice::new(i2c_bus);
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//! let i2c_dev2 = I2cDevice::new(i2c_bus);
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//! let mpu = Mpu6050::new(i2c_dev2);
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//! let mpu = Mpu6050::new(i2c_dev2);
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//! ```
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//! ```
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use core::future::Future;
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use core::future::Future;
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@ -28,27 +28,27 @@ use embassy::blocking_mutex::raw::RawMutex;
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use embassy::mutex::Mutex;
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use embassy::mutex::Mutex;
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use embedded_hal_async::i2c;
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use embedded_hal_async::i2c;
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use crate::shared_bus::I2cBusDeviceError;
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use crate::shared_bus::I2cDeviceError;
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use crate::SetConfig;
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use crate::SetConfig;
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pub struct I2cBusDevice<'a, M: RawMutex, BUS> {
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pub struct I2cDevice<'a, M: RawMutex, BUS> {
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bus: &'a Mutex<M, BUS>,
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bus: &'a Mutex<M, BUS>,
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}
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}
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impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> {
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impl<'a, M: RawMutex, BUS> I2cDevice<'a, M, BUS> {
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pub fn new(bus: &'a Mutex<M, BUS>) -> Self {
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pub fn new(bus: &'a Mutex<M, BUS>) -> Self {
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Self { bus }
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Self { bus }
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}
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}
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}
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}
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impl<'a, M: RawMutex, BUS> i2c::ErrorType for I2cBusDevice<'a, M, BUS>
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impl<'a, M: RawMutex, BUS> i2c::ErrorType for I2cDevice<'a, M, BUS>
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where
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where
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BUS: i2c::ErrorType,
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BUS: i2c::ErrorType,
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{
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{
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type Error = I2cBusDeviceError<BUS::Error>;
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type Error = I2cDeviceError<BUS::Error>;
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}
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}
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impl<M, BUS> i2c::I2c for I2cBusDevice<'_, M, BUS>
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impl<M, BUS> i2c::I2c for I2cDevice<'_, M, BUS>
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where
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where
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M: RawMutex + 'static,
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M: RawMutex + 'static,
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BUS: i2c::I2c + 'static,
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BUS: i2c::I2c + 'static,
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@ -58,7 +58,7 @@ where
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fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async move {
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async move {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.read(address, buffer).await.map_err(I2cBusDeviceError::I2c)?;
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bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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}
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}
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@ -68,7 +68,7 @@ where
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fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
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fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
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async move {
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async move {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.write(address, bytes).await.map_err(I2cBusDeviceError::I2c)?;
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bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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}
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}
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@ -85,7 +85,7 @@ where
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.write_read(address, wr_buffer, rd_buffer)
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bus.write_read(address, wr_buffer, rd_buffer)
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.await
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.await
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.map_err(I2cBusDeviceError::I2c)?;
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.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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}
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}
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@ -103,27 +103,27 @@ where
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}
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}
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}
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}
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pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
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pub struct I2cDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
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bus: &'a Mutex<M, BUS>,
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bus: &'a Mutex<M, BUS>,
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config: BUS::Config,
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config: BUS::Config,
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}
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}
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impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> {
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impl<'a, M: RawMutex, BUS: SetConfig> I2cDeviceWithConfig<'a, M, BUS> {
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pub fn new(bus: &'a Mutex<M, BUS>, config: BUS::Config) -> Self {
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pub fn new(bus: &'a Mutex<M, BUS>, config: BUS::Config) -> Self {
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Self { bus, config }
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Self { bus, config }
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}
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}
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}
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}
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impl<'a, M, BUS> i2c::ErrorType for I2cBusDeviceWithConfig<'a, M, BUS>
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impl<'a, M, BUS> i2c::ErrorType for I2cDeviceWithConfig<'a, M, BUS>
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where
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where
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BUS: i2c::ErrorType,
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BUS: i2c::ErrorType,
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M: RawMutex,
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M: RawMutex,
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BUS: SetConfig,
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BUS: SetConfig,
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{
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{
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type Error = I2cBusDeviceError<BUS::Error>;
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type Error = I2cDeviceError<BUS::Error>;
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}
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}
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impl<M, BUS> i2c::I2c for I2cBusDeviceWithConfig<'_, M, BUS>
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impl<M, BUS> i2c::I2c for I2cDeviceWithConfig<'_, M, BUS>
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where
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where
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M: RawMutex + 'static,
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M: RawMutex + 'static,
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BUS: i2c::I2c + SetConfig + 'static,
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BUS: i2c::I2c + SetConfig + 'static,
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@ -134,7 +134,7 @@ where
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async move {
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async move {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config);
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bus.read(address, buffer).await.map_err(I2cBusDeviceError::I2c)?;
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bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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}
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}
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@ -145,7 +145,7 @@ where
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async move {
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async move {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config);
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bus.write(address, bytes).await.map_err(I2cBusDeviceError::I2c)?;
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bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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}
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}
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@ -163,7 +163,7 @@ where
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bus.set_config(&self.config);
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bus.set_config(&self.config);
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bus.write_read(address, wr_buffer, rd_buffer)
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bus.write_read(address, wr_buffer, rd_buffer)
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.await
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.await
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.map_err(I2cBusDeviceError::I2c)?;
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.map_err(I2cDeviceError::I2c)?;
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Ok(())
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Ok(())
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}
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}
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}
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}
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@ -3,7 +3,7 @@
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//! # Example (nrf52)
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//! # Example (nrf52)
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//!
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//!
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//! ```rust
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//! ```rust
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//! use embassy_embedded_hal::shared_bus::spi::SpiBusDevice;
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//! use embassy_embedded_hal::shared_bus::spi::SpiDevice;
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//! use embassy::mutex::Mutex;
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//! use embassy::mutex::Mutex;
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//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
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//! use embassy::blocking_mutex::raw::ThreadModeRawMutex;
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//!
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//!
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@ -17,12 +17,12 @@
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//!
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//!
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//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display
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//! // Device 1, using embedded-hal-async compatible driver for ST7735 LCD display
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//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
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//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
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//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1);
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//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
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//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128);
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//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), 160, 128);
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//!
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//!
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//! // Device 2
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//! // Device 2
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//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
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//! let cs_pin2 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
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//! let spi_dev2 = SpiBusDevice::new(spi_bus, cs_pin2);
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//! let spi_dev2 = SpiDevice::new(spi_bus, cs_pin2);
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//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
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//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
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//! ```
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//! ```
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use core::future::Future;
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use core::future::Future;
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@ -33,29 +33,29 @@ use embedded_hal_1::digital::blocking::OutputPin;
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use embedded_hal_1::spi::ErrorType;
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use embedded_hal_1::spi::ErrorType;
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use embedded_hal_async::spi;
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use embedded_hal_async::spi;
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use crate::shared_bus::SpiBusDeviceError;
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use crate::shared_bus::SpiDeviceError;
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use crate::SetConfig;
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use crate::SetConfig;
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pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> {
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pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
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bus: &'a Mutex<M, BUS>,
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bus: &'a Mutex<M, BUS>,
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cs: CS,
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cs: CS,
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}
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}
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impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> {
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impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
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pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self {
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pub fn new(bus: &'a Mutex<M, BUS>, cs: CS) -> Self {
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Self { bus, cs }
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Self { bus, cs }
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}
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}
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}
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}
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impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS>
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impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
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where
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where
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BUS: spi::ErrorType,
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BUS: spi::ErrorType,
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CS: OutputPin,
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CS: OutputPin,
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{
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{
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type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
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type Error = SpiDeviceError<BUS::Error, CS::Error>;
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}
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}
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impl<M, BUS, CS> spi::SpiDevice for SpiBusDevice<'_, M, BUS, CS>
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impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
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where
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where
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M: RawMutex + 'static,
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M: RawMutex + 'static,
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BUS: spi::SpiBusFlush + 'static,
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BUS: spi::SpiBusFlush + 'static,
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@ -76,7 +76,7 @@ where
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{
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{
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async move {
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async move {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
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self.cs.set_low().map_err(SpiDeviceError::Cs)?;
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let f_res = f(&mut *bus).await;
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let f_res = f(&mut *bus).await;
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@ -84,37 +84,37 @@ where
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let flush_res = bus.flush().await;
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let flush_res = bus.flush().await;
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let cs_res = self.cs.set_high();
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let cs_res = self.cs.set_high();
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let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
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let f_res = f_res.map_err(SpiDeviceError::Spi)?;
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flush_res.map_err(SpiBusDeviceError::Spi)?;
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flush_res.map_err(SpiDeviceError::Spi)?;
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cs_res.map_err(SpiBusDeviceError::Cs)?;
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cs_res.map_err(SpiDeviceError::Cs)?;
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Ok(f_res)
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Ok(f_res)
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}
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}
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}
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}
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}
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}
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pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
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pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
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bus: &'a Mutex<M, BUS>,
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bus: &'a Mutex<M, BUS>,
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cs: CS,
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cs: CS,
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config: BUS::Config,
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config: BUS::Config,
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}
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}
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impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> {
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impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
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pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self {
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pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self {
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Self { bus, cs, config }
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Self { bus, cs, config }
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}
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}
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}
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}
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impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS>
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impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
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where
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where
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BUS: spi::ErrorType + SetConfig,
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BUS: spi::ErrorType + SetConfig,
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CS: OutputPin,
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CS: OutputPin,
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M: RawMutex,
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M: RawMutex,
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{
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{
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type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
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type Error = SpiDeviceError<BUS::Error, CS::Error>;
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}
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}
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impl<M, BUS, CS> spi::SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS>
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impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
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where
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where
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M: RawMutex + 'static,
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M: RawMutex + 'static,
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BUS: spi::SpiBusFlush + SetConfig + 'static,
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BUS: spi::SpiBusFlush + SetConfig + 'static,
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@ -136,7 +136,7 @@ where
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async move {
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async move {
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let mut bus = self.bus.lock().await;
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let mut bus = self.bus.lock().await;
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bus.set_config(&self.config);
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bus.set_config(&self.config);
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self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
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self.cs.set_low().map_err(SpiDeviceError::Cs)?;
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let f_res = f(&mut *bus).await;
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let f_res = f(&mut *bus).await;
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@ -144,9 +144,9 @@ where
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let flush_res = bus.flush().await;
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let flush_res = bus.flush().await;
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let cs_res = self.cs.set_high();
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let cs_res = self.cs.set_high();
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let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
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let f_res = f_res.map_err(SpiDeviceError::Spi)?;
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flush_res.map_err(SpiBusDeviceError::Spi)?;
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flush_res.map_err(SpiDeviceError::Spi)?;
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cs_res.map_err(SpiBusDeviceError::Cs)?;
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cs_res.map_err(SpiDeviceError::Cs)?;
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Ok(f_res)
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Ok(f_res)
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}
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}
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@ -3,7 +3,7 @@
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//! # Example (nrf52)
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//! # Example (nrf52)
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//!
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//!
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//! ```rust
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//! ```rust
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//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cBusDevice;
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//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cDevice;
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//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
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//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
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//!
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//!
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//! static I2C_BUS: Forever<NoopMutex<RefCell<Twim<TWISPI0>>>> = Forever::new();
|
//! static I2C_BUS: Forever<NoopMutex<RefCell<Twim<TWISPI0>>>> = Forever::new();
|
||||||
@ -12,7 +12,7 @@
|
|||||||
//! let i2c_bus = NoopMutex::new(RefCell::new(i2c));
|
//! let i2c_bus = NoopMutex::new(RefCell::new(i2c));
|
||||||
//! let i2c_bus = I2C_BUS.put(i2c_bus);
|
//! let i2c_bus = I2C_BUS.put(i2c_bus);
|
||||||
//!
|
//!
|
||||||
//! let i2c_dev1 = I2cBusDevice::new(i2c_bus);
|
//! let i2c_dev1 = I2cDevice::new(i2c_bus);
|
||||||
//! let mpu = Mpu6050::new(i2c_dev1);
|
//! let mpu = Mpu6050::new(i2c_dev1);
|
||||||
//! ```
|
//! ```
|
||||||
|
|
||||||
@ -23,46 +23,46 @@ use embassy::blocking_mutex::Mutex;
|
|||||||
use embedded_hal_1::i2c::blocking::{I2c, Operation};
|
use embedded_hal_1::i2c::blocking::{I2c, Operation};
|
||||||
use embedded_hal_1::i2c::ErrorType;
|
use embedded_hal_1::i2c::ErrorType;
|
||||||
|
|
||||||
use crate::shared_bus::I2cBusDeviceError;
|
use crate::shared_bus::I2cDeviceError;
|
||||||
use crate::SetConfig;
|
use crate::SetConfig;
|
||||||
|
|
||||||
pub struct I2cBusDevice<'a, M: RawMutex, BUS> {
|
pub struct I2cDevice<'a, M: RawMutex, BUS> {
|
||||||
bus: &'a Mutex<M, RefCell<BUS>>,
|
bus: &'a Mutex<M, RefCell<BUS>>,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS> I2cBusDevice<'a, M, BUS> {
|
impl<'a, M: RawMutex, BUS> I2cDevice<'a, M, BUS> {
|
||||||
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>) -> Self {
|
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>) -> Self {
|
||||||
Self { bus }
|
Self { bus }
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS> ErrorType for I2cBusDevice<'a, M, BUS>
|
impl<'a, M: RawMutex, BUS> ErrorType for I2cDevice<'a, M, BUS>
|
||||||
where
|
where
|
||||||
BUS: ErrorType,
|
BUS: ErrorType,
|
||||||
{
|
{
|
||||||
type Error = I2cBusDeviceError<BUS::Error>;
|
type Error = I2cDeviceError<BUS::Error>;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<M, BUS> I2c for I2cBusDevice<'_, M, BUS>
|
impl<M, BUS> I2c for I2cDevice<'_, M, BUS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: I2c,
|
BUS: I2c,
|
||||||
{
|
{
|
||||||
fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
|
fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
|
||||||
self.bus
|
self.bus
|
||||||
.lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cBusDeviceError::I2c))
|
.lock(|bus| bus.borrow_mut().read(address, buffer).map_err(I2cDeviceError::I2c))
|
||||||
}
|
}
|
||||||
|
|
||||||
fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
|
fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
|
||||||
self.bus
|
self.bus
|
||||||
.lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cBusDeviceError::I2c))
|
.lock(|bus| bus.borrow_mut().write(address, bytes).map_err(I2cDeviceError::I2c))
|
||||||
}
|
}
|
||||||
|
|
||||||
fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
|
fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
|
||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
bus.borrow_mut()
|
bus.borrow_mut()
|
||||||
.write_read(address, wr_buffer, rd_buffer)
|
.write_read(address, wr_buffer, rd_buffer)
|
||||||
.map_err(I2cBusDeviceError::I2c)
|
.map_err(I2cDeviceError::I2c)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -101,68 +101,68 @@ where
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cBusDevice<'_, M, BUS>
|
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cDevice<'_, M, BUS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: embedded_hal_02::blocking::i2c::Write<Error = E>,
|
BUS: embedded_hal_02::blocking::i2c::Write<Error = E>,
|
||||||
{
|
{
|
||||||
type Error = I2cBusDeviceError<E>;
|
type Error = I2cDeviceError<E>;
|
||||||
|
|
||||||
fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> {
|
fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> {
|
||||||
self.bus
|
self.bus
|
||||||
.lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cBusDeviceError::I2c))
|
.lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cDeviceError::I2c))
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cBusDevice<'_, M, BUS>
|
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cDevice<'_, M, BUS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: embedded_hal_02::blocking::i2c::Read<Error = E>,
|
BUS: embedded_hal_02::blocking::i2c::Read<Error = E>,
|
||||||
{
|
{
|
||||||
type Error = I2cBusDeviceError<E>;
|
type Error = I2cDeviceError<E>;
|
||||||
|
|
||||||
fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> {
|
fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> {
|
||||||
self.bus
|
self.bus
|
||||||
.lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cBusDeviceError::I2c))
|
.lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cDeviceError::I2c))
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cBusDevice<'_, M, BUS>
|
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cDevice<'_, M, BUS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>,
|
BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>,
|
||||||
{
|
{
|
||||||
type Error = I2cBusDeviceError<E>;
|
type Error = I2cDeviceError<E>;
|
||||||
|
|
||||||
fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> {
|
fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> {
|
||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
bus.borrow_mut()
|
bus.borrow_mut()
|
||||||
.write_read(addr, bytes, buffer)
|
.write_read(addr, bytes, buffer)
|
||||||
.map_err(I2cBusDeviceError::I2c)
|
.map_err(I2cDeviceError::I2c)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
|
pub struct I2cDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> {
|
||||||
bus: &'a Mutex<M, RefCell<BUS>>,
|
bus: &'a Mutex<M, RefCell<BUS>>,
|
||||||
config: BUS::Config,
|
config: BUS::Config,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> {
|
impl<'a, M: RawMutex, BUS: SetConfig> I2cDeviceWithConfig<'a, M, BUS> {
|
||||||
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: BUS::Config) -> Self {
|
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: BUS::Config) -> Self {
|
||||||
Self { bus, config }
|
Self { bus, config }
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M, BUS> ErrorType for I2cBusDeviceWithConfig<'a, M, BUS>
|
impl<'a, M, BUS> ErrorType for I2cDeviceWithConfig<'a, M, BUS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: ErrorType + SetConfig,
|
BUS: ErrorType + SetConfig,
|
||||||
{
|
{
|
||||||
type Error = I2cBusDeviceError<BUS::Error>;
|
type Error = I2cDeviceError<BUS::Error>;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<M, BUS> I2c for I2cBusDeviceWithConfig<'_, M, BUS>
|
impl<M, BUS> I2c for I2cDeviceWithConfig<'_, M, BUS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: I2c + SetConfig,
|
BUS: I2c + SetConfig,
|
||||||
@ -171,7 +171,7 @@ where
|
|||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
bus.set_config(&self.config);
|
bus.set_config(&self.config);
|
||||||
bus.read(address, buffer).map_err(I2cBusDeviceError::I2c)
|
bus.read(address, buffer).map_err(I2cDeviceError::I2c)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -179,7 +179,7 @@ where
|
|||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
bus.set_config(&self.config);
|
bus.set_config(&self.config);
|
||||||
bus.write(address, bytes).map_err(I2cBusDeviceError::I2c)
|
bus.write(address, bytes).map_err(I2cDeviceError::I2c)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -188,7 +188,7 @@ where
|
|||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
bus.set_config(&self.config);
|
bus.set_config(&self.config);
|
||||||
bus.write_read(address, wr_buffer, rd_buffer)
|
bus.write_read(address, wr_buffer, rd_buffer)
|
||||||
.map_err(I2cBusDeviceError::I2c)
|
.map_err(I2cDeviceError::I2c)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3,7 +3,7 @@
|
|||||||
//! # Example (nrf52)
|
//! # Example (nrf52)
|
||||||
//!
|
//!
|
||||||
//! ```rust
|
//! ```rust
|
||||||
//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiBusDevice;
|
//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiDevice;
|
||||||
//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
|
//! use embassy::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
|
||||||
//!
|
//!
|
||||||
//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new();
|
//! static SPI_BUS: Forever<NoopMutex<RefCell<Spim<SPI3>>>> = Forever::new();
|
||||||
@ -14,7 +14,7 @@
|
|||||||
//!
|
//!
|
||||||
//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display
|
//! // Device 1, using embedded-hal compatible driver for ST7735 LCD display
|
||||||
//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
|
//! let cs_pin1 = Output::new(p.P0_24, Level::Low, OutputDrive::Standard);
|
||||||
//! let spi_dev1 = SpiBusDevice::new(spi_bus, cs_pin1);
|
//! let spi_dev1 = SpiDevice::new(spi_bus, cs_pin1);
|
||||||
//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128);
|
//! let display1 = ST7735::new(spi_dev1, dc1, rst1, Default::default(), false, 160, 128);
|
||||||
//! ```
|
//! ```
|
||||||
|
|
||||||
@ -24,31 +24,31 @@ use embassy::blocking_mutex::raw::RawMutex;
|
|||||||
use embassy::blocking_mutex::Mutex;
|
use embassy::blocking_mutex::Mutex;
|
||||||
use embedded_hal_1::digital::blocking::OutputPin;
|
use embedded_hal_1::digital::blocking::OutputPin;
|
||||||
use embedded_hal_1::spi;
|
use embedded_hal_1::spi;
|
||||||
use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice};
|
use embedded_hal_1::spi::blocking::SpiBusFlush;
|
||||||
|
|
||||||
use crate::shared_bus::SpiBusDeviceError;
|
use crate::shared_bus::SpiDeviceError;
|
||||||
use crate::SetConfig;
|
use crate::SetConfig;
|
||||||
|
|
||||||
pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> {
|
pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
|
||||||
bus: &'a Mutex<M, RefCell<BUS>>,
|
bus: &'a Mutex<M, RefCell<BUS>>,
|
||||||
cs: CS,
|
cs: CS,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> {
|
impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> {
|
||||||
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
|
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
|
||||||
Self { bus, cs }
|
Self { bus, cs }
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS>
|
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS>
|
||||||
where
|
where
|
||||||
BUS: spi::ErrorType,
|
BUS: spi::ErrorType,
|
||||||
CS: OutputPin,
|
CS: OutputPin,
|
||||||
{
|
{
|
||||||
type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
|
type Error = SpiDeviceError<BUS::Error, CS::Error>;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<BUS, M, CS> SpiDevice for SpiBusDevice<'_, M, BUS, CS>
|
impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDevice<'_, M, BUS, CS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: SpiBusFlush,
|
BUS: SpiBusFlush,
|
||||||
@ -59,7 +59,7 @@ where
|
|||||||
fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
|
fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
|
||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
|
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
||||||
|
|
||||||
let f_res = f(&mut bus);
|
let f_res = f(&mut bus);
|
||||||
|
|
||||||
@ -67,78 +67,78 @@ where
|
|||||||
let flush_res = bus.flush();
|
let flush_res = bus.flush();
|
||||||
let cs_res = self.cs.set_high();
|
let cs_res = self.cs.set_high();
|
||||||
|
|
||||||
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
|
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
|
||||||
flush_res.map_err(SpiBusDeviceError::Spi)?;
|
flush_res.map_err(SpiDeviceError::Spi)?;
|
||||||
cs_res.map_err(SpiBusDeviceError::Cs)?;
|
cs_res.map_err(SpiDeviceError::Cs)?;
|
||||||
|
|
||||||
Ok(f_res)
|
Ok(f_res)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS>
|
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiDevice<'_, M, BUS, CS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
|
BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
|
||||||
CS: OutputPin<Error = CsErr>,
|
CS: OutputPin<Error = CsErr>,
|
||||||
{
|
{
|
||||||
type Error = SpiBusDeviceError<BusErr, CsErr>;
|
type Error = SpiDeviceError<BusErr, CsErr>;
|
||||||
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
|
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
|
||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
|
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
||||||
let f_res = bus.transfer(words);
|
let f_res = bus.transfer(words);
|
||||||
let cs_res = self.cs.set_high();
|
let cs_res = self.cs.set_high();
|
||||||
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
|
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
|
||||||
cs_res.map_err(SpiBusDeviceError::Cs)?;
|
cs_res.map_err(SpiDeviceError::Cs)?;
|
||||||
Ok(f_res)
|
Ok(f_res)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS>
|
impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiDevice<'_, M, BUS, CS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
|
BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
|
||||||
CS: OutputPin<Error = CsErr>,
|
CS: OutputPin<Error = CsErr>,
|
||||||
{
|
{
|
||||||
type Error = SpiBusDeviceError<BusErr, CsErr>;
|
type Error = SpiDeviceError<BusErr, CsErr>;
|
||||||
|
|
||||||
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
|
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
|
||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
|
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
||||||
let f_res = bus.write(words);
|
let f_res = bus.write(words);
|
||||||
let cs_res = self.cs.set_high();
|
let cs_res = self.cs.set_high();
|
||||||
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
|
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
|
||||||
cs_res.map_err(SpiBusDeviceError::Cs)?;
|
cs_res.map_err(SpiDeviceError::Cs)?;
|
||||||
Ok(f_res)
|
Ok(f_res)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
|
pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
|
||||||
bus: &'a Mutex<M, RefCell<BUS>>,
|
bus: &'a Mutex<M, RefCell<BUS>>,
|
||||||
cs: CS,
|
cs: CS,
|
||||||
config: BUS::Config,
|
config: BUS::Config,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> {
|
impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> {
|
||||||
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self {
|
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self {
|
||||||
Self { bus, cs, config }
|
Self { bus, cs, config }
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS>
|
impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: spi::ErrorType + SetConfig,
|
BUS: spi::ErrorType + SetConfig,
|
||||||
CS: OutputPin,
|
CS: OutputPin,
|
||||||
{
|
{
|
||||||
type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
|
type Error = SpiDeviceError<BUS::Error, CS::Error>;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<BUS, M, CS> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS>
|
impl<BUS, M, CS> embedded_hal_1::spi::blocking::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: SpiBusFlush + SetConfig,
|
BUS: SpiBusFlush + SetConfig,
|
||||||
@ -150,7 +150,7 @@ where
|
|||||||
self.bus.lock(|bus| {
|
self.bus.lock(|bus| {
|
||||||
let mut bus = bus.borrow_mut();
|
let mut bus = bus.borrow_mut();
|
||||||
bus.set_config(&self.config);
|
bus.set_config(&self.config);
|
||||||
self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
|
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
||||||
|
|
||||||
let f_res = f(&mut bus);
|
let f_res = f(&mut bus);
|
||||||
|
|
||||||
@ -158,9 +158,9 @@ where
|
|||||||
let flush_res = bus.flush();
|
let flush_res = bus.flush();
|
||||||
let cs_res = self.cs.set_high();
|
let cs_res = self.cs.set_high();
|
||||||
|
|
||||||
let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
|
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
|
||||||
flush_res.map_err(SpiBusDeviceError::Spi)?;
|
flush_res.map_err(SpiDeviceError::Spi)?;
|
||||||
cs_res.map_err(SpiBusDeviceError::Cs)?;
|
cs_res.map_err(SpiDeviceError::Cs)?;
|
||||||
Ok(f_res)
|
Ok(f_res)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
|
@ -9,11 +9,11 @@ pub mod asynch;
|
|||||||
pub mod blocking;
|
pub mod blocking;
|
||||||
|
|
||||||
#[derive(Copy, Clone, Eq, PartialEq, Debug)]
|
#[derive(Copy, Clone, Eq, PartialEq, Debug)]
|
||||||
pub enum I2cBusDeviceError<BUS> {
|
pub enum I2cDeviceError<BUS> {
|
||||||
I2c(BUS),
|
I2c(BUS),
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<BUS> i2c::Error for I2cBusDeviceError<BUS>
|
impl<BUS> i2c::Error for I2cDeviceError<BUS>
|
||||||
where
|
where
|
||||||
BUS: i2c::Error + Debug,
|
BUS: i2c::Error + Debug,
|
||||||
{
|
{
|
||||||
@ -25,12 +25,12 @@ where
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone, Eq, PartialEq, Debug)]
|
#[derive(Copy, Clone, Eq, PartialEq, Debug)]
|
||||||
pub enum SpiBusDeviceError<BUS, CS> {
|
pub enum SpiDeviceError<BUS, CS> {
|
||||||
Spi(BUS),
|
Spi(BUS),
|
||||||
Cs(CS),
|
Cs(CS),
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<BUS, CS> spi::Error for SpiBusDeviceError<BUS, CS>
|
impl<BUS, CS> spi::Error for SpiDeviceError<BUS, CS>
|
||||||
where
|
where
|
||||||
BUS: spi::Error + Debug,
|
BUS: spi::Error + Debug,
|
||||||
CS: Debug,
|
CS: Debug,
|
||||||
|
Loading…
Reference in New Issue
Block a user