Initial PDM driver
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185
embassy-nrf/src/pdm.rs
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185
embassy-nrf/src/pdm.rs
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#![macro_use]
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use embassy_util::waitqueue::AtomicWaker;
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use futures::future::poll_fn;
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use pac::{pdm, PDM};
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use pdm::mode::{EDGE_A, OPERATION_A};
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use fixed::types::I7F1;
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use crate::interrupt::InterruptExt;
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use crate::gpio::Pin as GpioPin;
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use crate::{interrupt, pac, peripherals, Peripheral};
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {}
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/// One-shot and continuous PDM.
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pub struct Pdm<'d> {
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_p: PeripheralRef<'d, peripherals::PDM>,
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}
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static WAKER: AtomicWaker = AtomicWaker::new();
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/// Used to configure the PDM peripheral.
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///
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/// See the `Default` impl for suitable default values.
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#[non_exhaustive]
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pub struct Config {
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/// Clock
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/// Clock ratio
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/// Channels
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pub channels: Channels,
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/// Edge to sample on
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pub left_edge: Edge,
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/// Gain left in dB
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pub gain_left: I7F1,
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/// Gain right in dB
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pub gain_right: I7F1,
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}
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impl Default for Config {
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/// Default configuration for single channel sampling.
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fn default() -> Self {
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Self {
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channels: Channels::Stereo,
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left_edge: Edge::FallingEdge,
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gain_left: I7F1::ZERO,
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gain_right: I7F1::ZERO,
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}
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}
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}
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/// The state of a continuously running sampler. While it reflects
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/// the progress of a sampler, it also signals what should be done
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/// next. For example, if the sampler has stopped then the Pdm implementation
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/// can then tear down its infrastructure.
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#[derive(PartialEq)]
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pub enum SamplerState {
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Sampled,
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Stopped,
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}
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impl<'d> Pdm<'d> {
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pub fn new(
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pdm: impl Peripheral<P = peripherals::PDM> + 'd,
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irq: impl Peripheral<P = interrupt::PDM> + 'd,
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data: impl Peripheral<P = impl GpioPin> + 'd,
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clock: impl Peripheral<P = impl GpioPin> + 'd,
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config: Config,
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) -> Self {
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into_ref!(pdm, irq, data, clock);
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let r = unsafe { &*PDM::ptr() };
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let Config { channels, left_edge, gain_left, gain_right } = config;
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// Configure channels
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r.enable.write(|w| w.enable().enabled());
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// TODO: Clock control
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r.mode.write(|w| {
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w.operation().variant(channels.into());
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w.edge().variant(left_edge.into());
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w
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});
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r.psel.din.write(|w| unsafe { w.bits(data.psel_bits()) });
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r.psel.clk.write(|w| unsafe { w.bits(clock.psel_bits()) });
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// Disable all events interrupts
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r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) });
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.enable();
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Self { _p: pdm }
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}
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fn on_interrupt(_ctx: *mut ()) {
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let r = Self::regs();
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if r.events_end.read().bits() != 0 {
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r.intenclr.write(|w| w.end().clear());
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WAKER.wake();
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}
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if r.events_started.read().bits() != 0 {
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r.intenclr.write(|w| w.started().clear());
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WAKER.wake();
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}
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}
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fn regs() -> &'static pdm::RegisterBlock {
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unsafe { &*PDM::ptr() }
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}
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/// One shot sampling. If the PDM is configured for multiple channels, the samples will be interleaved.
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pub async fn sample<const N: usize>(&mut self, buf: &mut [i16; N]) {
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let r = Self::regs();
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// Set up the DMA
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r.sample.ptr.write(|w| unsafe { w.sampleptr().bits(buf.as_mut_ptr() as u32) });
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r.sample.maxcnt.write(|w| unsafe { w.buffsize().bits(N as _) });
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// Reset and enable the end event
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r.events_end.reset();
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r.intenset.write(|w| w.end().set());
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// Don't reorder the start event before the previous writes. Hopefully self
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// wouldn't happen anyway.
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compiler_fence(Ordering::SeqCst);
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r.tasks_start.write(|w| { w.tasks_start().set_bit() });
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// Wait for 'end' event.
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poll_fn(|cx| {
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let r = Self::regs();
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WAKER.register(cx.waker());
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if r.events_end.read().bits() != 0 {
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r.events_end.reset();
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return Poll::Ready(());
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}
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Poll::Pending
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})
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.await;
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}
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}
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#[derive(Clone, Copy, PartialEq)]
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pub enum Edge {
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FallingEdge,
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RisingEdge,
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}
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impl From<Edge> for EDGE_A {
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fn from(edge: Edge) -> Self {
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match edge {
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Edge::FallingEdge => EDGE_A::LEFTFALLING,
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Edge::RisingEdge => EDGE_A::LEFTRISING,
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}
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}
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}
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#[derive(Clone, Copy, PartialEq)]
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pub enum Channels {
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Stereo,
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Mono,
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}
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impl From<Channels> for OPERATION_A {
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fn from(ch: Channels) -> Self {
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match ch {
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Channels::Stereo => OPERATION_A::STEREO,
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Channels::Mono => OPERATION_A::MONO,
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}
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}
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}
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