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Refactor: Factor out SampleTime

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This commit is contained in:
Grant Miller 2022-10-26 00:31:46 -05:00
parent 61560e740d
commit a5b1d2237f
6 changed files with 123 additions and 256 deletions
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57
embassy-stm32/src/adc/f1.rs
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@ -3,7 +3,7 @@ use core::marker::PhantomData;
use embassy_hal_common::into_ref; use embassy_hal_common::into_ref;
use embedded_hal_02::blocking::delay::DelayUs; use embedded_hal_02::blocking::delay::DelayUs;
use crate::adc::{AdcPin, Instance}; use crate::adc::{AdcPin, Instance, SampleTime};
use crate::rcc::get_freqs; use crate::rcc::get_freqs;
use crate::time::Hertz; use crate::time::Hertz;
use crate::Peripheral; use crate::Peripheral;
@ -29,61 +29,6 @@ impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
} }
} }
mod sample_time {
/// ADC sample time
///
/// The default setting is 1.5 ADC clock cycles.
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
/// 1.5 ADC clock cycles
Cycles1_5 = 0b000,
/// 7.5 ADC clock cycles
Cycles7_5 = 0b001,
/// 13.5 ADC clock cycles
Cycles13_5 = 0b010,
/// 28.5 ADC clock cycles
Cycles28_5 = 0b011,
/// 41.5 ADC clock cycles
Cycles41_5 = 0b100,
/// 55.5 ADC clock cycles
Cycles55_5 = 0b101,
/// 71.5 ADC clock cycles
Cycles71_5 = 0b110,
/// 239.5 ADC clock cycles
Cycles239_5 = 0b111,
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::SampleTime {
match self {
SampleTime::Cycles1_5 => crate::pac::adc::vals::SampleTime::CYCLES1_5,
SampleTime::Cycles7_5 => crate::pac::adc::vals::SampleTime::CYCLES7_5,
SampleTime::Cycles13_5 => crate::pac::adc::vals::SampleTime::CYCLES13_5,
SampleTime::Cycles28_5 => crate::pac::adc::vals::SampleTime::CYCLES28_5,
SampleTime::Cycles41_5 => crate::pac::adc::vals::SampleTime::CYCLES41_5,
SampleTime::Cycles55_5 => crate::pac::adc::vals::SampleTime::CYCLES55_5,
SampleTime::Cycles71_5 => crate::pac::adc::vals::SampleTime::CYCLES71_5,
SampleTime::Cycles239_5 => crate::pac::adc::vals::SampleTime::CYCLES239_5,
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::Cycles28_5
}
}
}
pub use sample_time::SampleTime;
pub struct Adc<'d, T: Instance> { pub struct Adc<'d, T: Instance> {
sample_time: SampleTime, sample_time: SampleTime,
phantom: PhantomData<&'d mut T>, phantom: PhantomData<&'d mut T>,

5
embassy-stm32/src/adc/mod.rs
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@ -8,8 +8,13 @@
#[cfg_attr(adc_v1, path = "v1.rs")] #[cfg_attr(adc_v1, path = "v1.rs")]
mod _version; mod _version;
#[cfg(not(adc_v1))]
mod sample_time;
#[allow(unused)] #[allow(unused)]
pub use _version::*; pub use _version::*;
#[cfg(not(adc_v1))]
pub use sample_time::SampleTime;
use crate::peripherals; use crate::peripherals;

114
embassy-stm32/src/adc/sample_time.rs Normal file
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@ -0,0 +1,114 @@
macro_rules! impl_sample_time {
($default_doc:expr, $default:ident, $pac:ty, ($(($doc:expr, $variant:ident, $pac_variant:ident)),*)) => {
#[doc = concat!("ADC sample time\n\nThe default setting is ", $default_doc, " ADC clock cycles.")]
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
$(
#[doc = concat!($doc, " ADC clock cycles.")]
$variant,
)*
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> $pac {
match self {
$(Self::$variant => <$pac>::$pac_variant),*
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::$default
}
}
};
}
// TODO: Fix default
#[cfg(adc_f1)]
impl_sample_time!(
"1.5",
Cycles28_5,
crate::pac::adc::vals::SampleTime,
(
("1.5", Cycles1_5, CYCLES1_5),
("7.5", Cycles7_5, CYCLES7_5),
("13.5", Cycles13_5, CYCLES13_5),
("28.5", Cycles28_5, CYCLES28_5),
("41.5", Cycles41_5, CYCLES41_5),
("55.5", Cycles55_5, CYCLES55_5),
("71.5", Cycles71_5, CYCLES71_5),
("239.5", Cycles239_5, CYCLES239_5)
)
);
// TODO: Fix 85 vs 84
#[cfg(adc_v2)]
impl_sample_time!(
"3",
Cycles3,
crate::pac::adc::vals::Smp,
(
("3", Cycles3, CYCLES3),
("15", Cycles15, CYCLES15),
("28", Cycles28, CYCLES28),
("56", Cycles56, CYCLES56),
("85", Cycles85, CYCLES84),
("112", Cycles112, CYCLES112),
("144", Cycles144, CYCLES144),
("480", Cycles480, CYCLES480)
)
);
#[cfg(adc_v3)]
impl_sample_time!(
"2.5",
Cycles2_5,
crate::pac::adc::vals::SampleTime,
(
("2.5", Cycles2_5, CYCLES2_5),
("6.5", Cycles6_5, CYCLES6_5),
("12.5", Cycles12_5, CYCLES12_5),
("24.5", Cycles24_5, CYCLES24_5),
("47.5", Cycles47_5, CYCLES47_5),
("92.5", Cycles92_5, CYCLES92_5),
("247.5", Cycles247_5, CYCLES247_5),
("640.5", Cycles640_5, CYCLES640_5)
)
);
#[cfg(adc_g0)]
impl_sample_time!(
"1.5",
Cycles1_5,
crate::pac::adc::vals::SampleTime,
(
("1.5", Cycles1_5, CYCLES1_5),
("3.5", Cycles3_5, CYCLES3_5),
("7.5", Cycles7_5, CYCLES7_5),
("12.5", Cycles12_5, CYCLES12_5),
("19.5", Cycles19_5, CYCLES19_5),
("39.5", Cycles39_5, CYCLES39_5),
("79.5", Cycles79_5, CYCLES79_5),
("160.5", Cycles160_5, CYCLES160_5)
)
);
// TODO: Fix default doc
#[cfg(adc_v4)]
impl_sample_time!(
"2.5",
Cycles1_5,
crate::pac::adc::vals::Smp,
(
("1.5", Cycles1_5, CYCLES1_5),
("2.5", Cycles2_5, CYCLES2_5),
("8.5", Cycles8_5, CYCLES8_5),
("16.5", Cycles16_5, CYCLES16_5),
("32.5", Cycles32_5, CYCLES32_5),
("64.5", Cycles64_5, CYCLES64_5),
("387.5", Cycles387_5, CYCLES387_5),
("810.5", Cycles810_5, CYCLES810_5)
)
);

38
embassy-stm32/src/adc/v2.rs
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@ -4,7 +4,7 @@ use embassy_hal_common::into_ref;
use embedded_hal_02::blocking::delay::DelayUs; use embedded_hal_02::blocking::delay::DelayUs;
use super::InternalChannel; use super::InternalChannel;
use crate::adc::{AdcPin, Instance}; use crate::adc::{AdcPin, Instance, SampleTime};
use crate::peripherals::ADC1; use crate::peripherals::ADC1;
use crate::time::Hertz; use crate::time::Hertz;
use crate::Peripheral; use crate::Peripheral;
@ -94,42 +94,6 @@ impl super::sealed::InternalChannel<ADC1> for Vbat {
} }
} }
/// ADC sample time
///
/// The default setting is 3 ADC clock cycles.
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
Cycles3 = 0b000,
Cycles15 = 0b001,
Cycles28 = 0b010,
Cycles56 = 0b011,
Cycles85 = 0b100,
Cycles112 = 0b101,
Cycles144 = 0b110,
Cycles480 = 0b111,
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::Smp {
match self {
SampleTime::Cycles3 => crate::pac::adc::vals::Smp::CYCLES3,
SampleTime::Cycles15 => crate::pac::adc::vals::Smp::CYCLES15,
SampleTime::Cycles28 => crate::pac::adc::vals::Smp::CYCLES28,
SampleTime::Cycles56 => crate::pac::adc::vals::Smp::CYCLES56,
SampleTime::Cycles85 => crate::pac::adc::vals::Smp::CYCLES84,
SampleTime::Cycles112 => crate::pac::adc::vals::Smp::CYCLES112,
SampleTime::Cycles144 => crate::pac::adc::vals::Smp::CYCLES144,
SampleTime::Cycles480 => crate::pac::adc::vals::Smp::CYCLES480,
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::Cycles3
}
}
enum Prescaler { enum Prescaler {
Div2, Div2,
Div4, Div4,

112
embassy-stm32/src/adc/v3.rs
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@ -3,7 +3,7 @@ use core::marker::PhantomData;
use embassy_hal_common::into_ref; use embassy_hal_common::into_ref;
use embedded_hal_02::blocking::delay::DelayUs; use embedded_hal_02::blocking::delay::DelayUs;
use crate::adc::{AdcPin, Instance}; use crate::adc::{AdcPin, Instance, SampleTime};
use crate::Peripheral; use crate::Peripheral;
/// Default VREF voltage used for sample conversion to millivolts. /// Default VREF voltage used for sample conversion to millivolts.
@ -93,116 +93,6 @@ impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
} }
} }
#[cfg(not(adc_g0))]
mod sample_time {
/// ADC sample time
///
/// The default setting is 2.5 ADC clock cycles.
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
/// 2.5 ADC clock cycles
Cycles2_5 = 0b000,
/// 6.5 ADC clock cycles
Cycles6_5 = 0b001,
/// 12.5 ADC clock cycles
Cycles12_5 = 0b010,
/// 24.5 ADC clock cycles
Cycles24_5 = 0b011,
/// 47.5 ADC clock cycles
Cycles47_5 = 0b100,
/// 92.5 ADC clock cycles
Cycles92_5 = 0b101,
/// 247.5 ADC clock cycles
Cycles247_5 = 0b110,
/// 640.5 ADC clock cycles
Cycles640_5 = 0b111,
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::SampleTime {
match self {
SampleTime::Cycles2_5 => crate::pac::adc::vals::SampleTime::CYCLES2_5,
SampleTime::Cycles6_5 => crate::pac::adc::vals::SampleTime::CYCLES6_5,
SampleTime::Cycles12_5 => crate::pac::adc::vals::SampleTime::CYCLES12_5,
SampleTime::Cycles24_5 => crate::pac::adc::vals::SampleTime::CYCLES24_5,
SampleTime::Cycles47_5 => crate::pac::adc::vals::SampleTime::CYCLES47_5,
SampleTime::Cycles92_5 => crate::pac::adc::vals::SampleTime::CYCLES92_5,
SampleTime::Cycles247_5 => crate::pac::adc::vals::SampleTime::CYCLES247_5,
SampleTime::Cycles640_5 => crate::pac::adc::vals::SampleTime::CYCLES640_5,
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::Cycles2_5
}
}
}
#[cfg(adc_g0)]
mod sample_time {
/// ADC sample time
///
/// The default setting is 1.5 ADC clock cycles.
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
/// 1.5 ADC clock cycles
Cycles1_5 = 0b000,
/// 3.5 ADC clock cycles
Cycles3_5 = 0b001,
/// 7.5 ADC clock cycles
Cycles7_5 = 0b010,
/// 12.5 ADC clock cycles
Cycles12_5 = 0b011,
/// 19.5 ADC clock cycles
Cycles19_5 = 0b100,
/// 39.5 ADC clock cycles
Cycles39_5 = 0b101,
/// 79.5 ADC clock cycles
Cycles79_5 = 0b110,
/// 160.5 ADC clock cycles
Cycles160_5 = 0b111,
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::SampleTime {
match self {
SampleTime::Cycles1_5 => crate::pac::adc::vals::SampleTime::CYCLES1_5,
SampleTime::Cycles3_5 => crate::pac::adc::vals::SampleTime::CYCLES3_5,
SampleTime::Cycles7_5 => crate::pac::adc::vals::SampleTime::CYCLES7_5,
SampleTime::Cycles12_5 => crate::pac::adc::vals::SampleTime::CYCLES12_5,
SampleTime::Cycles19_5 => crate::pac::adc::vals::SampleTime::CYCLES19_5,
SampleTime::Cycles39_5 => crate::pac::adc::vals::SampleTime::CYCLES39_5,
SampleTime::Cycles79_5 => crate::pac::adc::vals::SampleTime::CYCLES79_5,
SampleTime::Cycles160_5 => crate::pac::adc::vals::SampleTime::CYCLES160_5,
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::Cycles1_5
}
}
}
pub use sample_time::SampleTime;
pub struct Adc<'d, T: Instance> { pub struct Adc<'d, T: Instance> {
sample_time: SampleTime, sample_time: SampleTime,
resolution: Resolution, resolution: Resolution,

53
embassy-stm32/src/adc/v4.rs
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@ -5,7 +5,7 @@ use embedded_hal_02::blocking::delay::DelayUs;
use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel};
use pac::adccommon::vals::Presc; use pac::adccommon::vals::Presc;
use super::{AdcPin, Instance, InternalChannel}; use super::{AdcPin, Instance, InternalChannel, SampleTime};
use crate::time::Hertz; use crate::time::Hertz;
use crate::{pac, Peripheral}; use crate::{pac, Peripheral};
@ -193,57 +193,6 @@ foreach_peripheral!(
}; };
); );
/// ADC sample time
///
/// The default setting is 2.5 ADC clock cycles.
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
/// 1.5 ADC clock cycles
Cycles1_5,
/// 2.5 ADC clock cycles
Cycles2_5,
/// 8.5 ADC clock cycles
Cycles8_5,
/// 16.5 ADC clock cycles
Cycles16_5,
/// 32.5 ADC clock cycles
Cycles32_5,
/// 64.5 ADC clock cycles
Cycles64_5,
/// 387.5 ADC clock cycles
Cycles387_5,
/// 810.5 ADC clock cycles
Cycles810_5,
}
impl SampleTime {
pub(crate) fn sample_time(&self) -> pac::adc::vals::Smp {
match self {
SampleTime::Cycles1_5 => pac::adc::vals::Smp::CYCLES1_5,
SampleTime::Cycles2_5 => pac::adc::vals::Smp::CYCLES2_5,
SampleTime::Cycles8_5 => pac::adc::vals::Smp::CYCLES8_5,
SampleTime::Cycles16_5 => pac::adc::vals::Smp::CYCLES16_5,
SampleTime::Cycles32_5 => pac::adc::vals::Smp::CYCLES32_5,
SampleTime::Cycles64_5 => pac::adc::vals::Smp::CYCLES64_5,
SampleTime::Cycles387_5 => pac::adc::vals::Smp::CYCLES387_5,
SampleTime::Cycles810_5 => pac::adc::vals::Smp::CYCLES810_5,
}
}
}
impl Default for SampleTime {
fn default() -> Self {
Self::Cycles1_5
}
}
// NOTE (unused): The prescaler enum closely copies the hardware capabilities, // NOTE (unused): The prescaler enum closely copies the hardware capabilities,
// but high prescaling doesn't make a lot of sense in the current implementation and is ommited. // but high prescaling doesn't make a lot of sense in the current implementation and is ommited.
#[allow(unused)] #[allow(unused)]