stm32/usart: add OVER8 and PRESC support, update PAC
This commit is contained in:
parent
b2047c4351
commit
a61701b756
@ -58,7 +58,7 @@ sdio-host = "0.5.0"
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
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critical-section = "1.1"
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critical-section = "1.1"
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atomic-polyfill = "1.0.1"
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atomic-polyfill = "1.0.1"
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stm32-metapac = "6"
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stm32-metapac = "7"
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vcell = "0.1.3"
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vcell = "0.1.3"
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bxcan = "0.7.0"
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bxcan = "0.7.0"
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nb = "1.0.0"
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nb = "1.0.0"
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@ -74,7 +74,7 @@ critical-section = { version = "1.1", features = ["std"] }
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[build-dependencies]
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[build-dependencies]
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proc-macro2 = "1.0.36"
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proc-macro2 = "1.0.36"
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quote = "1.0.15"
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quote = "1.0.15"
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stm32-metapac = { version = "6", default-features = false, features = ["metadata"]}
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stm32-metapac = { version = "7", default-features = false, features = ["metadata"]}
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[features]
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[features]
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default = ["stm32-metapac/rt"]
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default = ["stm32-metapac/rt"]
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@ -84,7 +84,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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Self::new_inner(peri, irq, rx, tx, tx_buffer, rx_buffer, config)
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Self::new_inner(peri, irq, rx, tx, tx_buffer, rx_buffer, config)
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}
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}
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#[cfg(not(usart_v1))]
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#[cfg(not(any(usart_v1, usart_v2)))]
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pub fn new_with_de(
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pub fn new_with_de(
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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@ -133,7 +133,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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}
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, true, true);
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configure(r, &config, T::frequency(), T::KIND, true, true);
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unsafe {
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unsafe {
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r.cr1().modify(|w| {
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r.cr1().modify(|w| {
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@ -12,10 +12,11 @@ use futures::future::{select, Either};
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use crate::dma::{NoDma, Transfer};
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use crate::dma::{NoDma, Transfer};
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use crate::gpio::sealed::AFType;
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use crate::gpio::sealed::AFType;
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#[cfg(any(lpuart_v1, lpuart_v2))]
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#[cfg(not(any(usart_v1, usart_v2)))]
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use crate::pac::lpuart::{regs, vals, Lpuart as Regs};
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use crate::pac::usart::Lpuart as Regs;
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#[cfg(not(any(lpuart_v1, lpuart_v2)))]
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#[cfg(any(usart_v1, usart_v2))]
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use crate::pac::usart::{regs, vals, Usart as Regs};
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use crate::pac::usart::Usart as Regs;
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use crate::pac::usart::{regs, vals};
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use crate::time::Hertz;
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use crate::time::Hertz;
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use crate::{peripherals, Peripheral};
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use crate::{peripherals, Peripheral};
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@ -159,7 +160,7 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> {
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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}
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, false, true);
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configure(r, &config, T::frequency(), T::KIND, false, true);
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// create state once!
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// create state once!
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let _s = T::state();
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let _s = T::state();
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@ -261,7 +262,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
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rx.set_as_af(rx.af_num(), AFType::Input);
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rx.set_as_af(rx.af_num(), AFType::Input);
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}
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, true, false);
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configure(r, &config, T::frequency(), T::KIND, true, false);
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irq.set_handler(Self::on_interrupt);
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.unpend();
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@ -653,7 +654,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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Self::new_inner(peri, rx, tx, irq, tx_dma, rx_dma, config)
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Self::new_inner(peri, rx, tx, irq, tx_dma, rx_dma, config)
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}
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}
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#[cfg(not(usart_v1))]
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#[cfg(not(any(usart_v1, usart_v2)))]
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pub fn new_with_de(
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pub fn new_with_de(
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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@ -696,7 +697,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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}
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}
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configure(r, &config, T::frequency(), T::MULTIPLIER, true, true);
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configure(r, &config, T::frequency(), T::KIND, true, true);
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irq.set_handler(UartRx::<T, RxDma>::on_interrupt);
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irq.set_handler(UartRx::<T, RxDma>::on_interrupt);
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irq.unpend();
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irq.unpend();
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@ -763,16 +764,74 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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}
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}
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}
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}
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fn configure(r: Regs, config: &Config, pclk_freq: Hertz, multiplier: u32, enable_rx: bool, enable_tx: bool) {
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fn configure(r: Regs, config: &Config, pclk_freq: Hertz, kind: Kind, enable_rx: bool, enable_tx: bool) {
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if !enable_rx && !enable_tx {
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if !enable_rx && !enable_tx {
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panic!("USART: At least one of RX or TX should be enabled");
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panic!("USART: At least one of RX or TX should be enabled");
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}
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}
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// TODO: better calculation, including error checking and OVER8 if possible.
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#[cfg(not(usart_v4))]
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let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate * multiplier;
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static DIVS: [(u16, ()); 1] = [(1, ())];
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#[cfg(usart_v4)]
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static DIVS: [(u16, vals::Presc); 12] = [
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(1, vals::Presc::DIV1),
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(2, vals::Presc::DIV2),
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(4, vals::Presc::DIV4),
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(6, vals::Presc::DIV6),
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(8, vals::Presc::DIV8),
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(10, vals::Presc::DIV10),
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(12, vals::Presc::DIV12),
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(16, vals::Presc::DIV16),
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(32, vals::Presc::DIV32),
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(64, vals::Presc::DIV64),
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(128, vals::Presc::DIV128),
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(256, vals::Presc::DIV256),
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];
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let (mul, brr_min, brr_max) = match kind {
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#[cfg(any(usart_v3, usart_v4))]
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Kind::Lpuart => (256, 0x300, 0x10_0000),
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Kind::Uart => (1, 0x10, 0x1_0000),
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};
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#[cfg(not(usart_v1))]
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let mut over8 = false;
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let mut found = false;
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for &(presc, _presc_val) in &DIVS {
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let denom = (config.baudrate * presc as u32) as u64;
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let div = (pclk_freq.0 as u64 * mul + (denom / 2)) / denom;
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trace!("USART: presc={} div={:08x}", presc, div);
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if div < brr_min {
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#[cfg(not(usart_v1))]
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if div * 2 >= brr_min && kind == Kind::Uart && !cfg!(usart_v1) {
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over8 = true;
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let div = div as u32;
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unsafe {
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r.brr().write_value(regs::Brr(((div << 1) & !0xF) | (div & 0x07)));
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#[cfg(usart_v4)]
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r.presc().write(|w| w.set_prescaler(_presc_val));
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}
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found = true;
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break;
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}
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panic!("USART: baudrate too high");
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}
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if div < brr_max {
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unsafe {
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r.brr().write_value(regs::Brr(div as u32));
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#[cfg(usart_v4)]
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r.presc().write(|w| w.set_prescaler(_presc_val));
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}
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found = true;
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break;
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}
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}
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assert!(found, "USART: baudrate too low");
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unsafe {
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unsafe {
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r.brr().write_value(regs::Brr(div));
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r.cr2().write(|w| {
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r.cr2().write(|w| {
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w.set_stop(match config.stop_bits {
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w.set_stop(match config.stop_bits {
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StopBits::STOP0P5 => vals::Stop::STOP0P5,
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StopBits::STOP0P5 => vals::Stop::STOP0P5,
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@ -801,6 +860,8 @@ fn configure(r: Regs, config: &Config, pclk_freq: Hertz, multiplier: u32, enable
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Parity::ParityEven => vals::Ps::EVEN,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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});
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#[cfg(not(usart_v1))]
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w.set_over8(vals::Over8(over8 as _));
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});
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});
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}
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}
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}
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}
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@ -986,43 +1047,45 @@ mod rx_ringbuffered;
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#[cfg(not(gpdma))]
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#[cfg(not(gpdma))]
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pub use rx_ringbuffered::RingBufferedUartRx;
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pub use rx_ringbuffered::RingBufferedUartRx;
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#[cfg(usart_v1)]
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use self::sealed::Kind;
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#[cfg(any(usart_v1, usart_v2))]
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fn tdr(r: crate::pac::usart::Usart) -> *mut u8 {
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fn tdr(r: crate::pac::usart::Usart) -> *mut u8 {
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r.dr().ptr() as _
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r.dr().ptr() as _
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}
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}
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#[cfg(usart_v1)]
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#[cfg(any(usart_v1, usart_v2))]
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fn rdr(r: crate::pac::usart::Usart) -> *mut u8 {
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fn rdr(r: crate::pac::usart::Usart) -> *mut u8 {
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r.dr().ptr() as _
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r.dr().ptr() as _
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}
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}
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#[cfg(usart_v1)]
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#[cfg(any(usart_v1, usart_v2))]
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fn sr(r: crate::pac::usart::Usart) -> crate::pac::common::Reg<regs::Sr, crate::pac::common::RW> {
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fn sr(r: crate::pac::usart::Usart) -> crate::pac::common::Reg<regs::Sr, crate::pac::common::RW> {
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r.sr()
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r.sr()
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}
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}
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#[cfg(usart_v1)]
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#[cfg(any(usart_v1, usart_v2))]
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#[allow(unused)]
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#[allow(unused)]
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unsafe fn clear_interrupt_flags(_r: Regs, _sr: regs::Sr) {
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unsafe fn clear_interrupt_flags(_r: Regs, _sr: regs::Sr) {
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// On v1 the flags are cleared implicitly by reads and writes to DR.
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// On v1 the flags are cleared implicitly by reads and writes to DR.
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}
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}
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#[cfg(usart_v2)]
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#[cfg(any(usart_v3, usart_v4))]
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fn tdr(r: Regs) -> *mut u8 {
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fn tdr(r: Regs) -> *mut u8 {
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r.tdr().ptr() as _
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r.tdr().ptr() as _
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}
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}
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#[cfg(usart_v2)]
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#[cfg(any(usart_v3, usart_v4))]
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fn rdr(r: Regs) -> *mut u8 {
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fn rdr(r: Regs) -> *mut u8 {
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r.rdr().ptr() as _
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r.rdr().ptr() as _
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}
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}
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#[cfg(usart_v2)]
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#[cfg(any(usart_v3, usart_v4))]
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fn sr(r: Regs) -> crate::pac::common::Reg<regs::Isr, crate::pac::common::R> {
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fn sr(r: Regs) -> crate::pac::common::Reg<regs::Isr, crate::pac::common::R> {
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r.isr()
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r.isr()
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}
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}
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#[cfg(usart_v2)]
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#[cfg(any(usart_v3, usart_v4))]
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#[allow(unused)]
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#[allow(unused)]
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unsafe fn clear_interrupt_flags(r: Regs, sr: regs::Isr) {
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unsafe fn clear_interrupt_flags(r: Regs, sr: regs::Isr) {
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r.icr().write(|w| *w = regs::Icr(sr.0));
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r.icr().write(|w| *w = regs::Icr(sr.0));
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@ -1033,6 +1096,13 @@ pub(crate) mod sealed {
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use super::*;
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use super::*;
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#[derive(Clone, Copy, PartialEq, Eq)]
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pub enum Kind {
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Uart,
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#[cfg(any(usart_v3, usart_v4))]
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Lpuart,
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}
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pub struct State {
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pub struct State {
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pub rx_waker: AtomicWaker,
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pub rx_waker: AtomicWaker,
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pub tx_waker: AtomicWaker,
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pub tx_waker: AtomicWaker,
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@ -1048,7 +1118,7 @@ pub(crate) mod sealed {
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}
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}
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pub trait BasicInstance: crate::rcc::RccPeripheral {
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pub trait BasicInstance: crate::rcc::RccPeripheral {
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const MULTIPLIER: u32;
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const KIND: Kind;
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type Interrupt: crate::interrupt::Interrupt;
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type Interrupt: crate::interrupt::Interrupt;
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fn regs() -> Regs;
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fn regs() -> Regs;
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@ -1077,10 +1147,10 @@ pin_trait!(DePin, BasicInstance);
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dma_trait!(TxDma, BasicInstance);
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dma_trait!(TxDma, BasicInstance);
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dma_trait!(RxDma, BasicInstance);
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dma_trait!(RxDma, BasicInstance);
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macro_rules! impl_lpuart {
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macro_rules! impl_usart {
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($inst:ident, $irq:ident, $mul:expr) => {
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($inst:ident, $irq:ident, $kind:expr) => {
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impl sealed::BasicInstance for crate::peripherals::$inst {
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impl sealed::BasicInstance for crate::peripherals::$inst {
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const MULTIPLIER: u32 = $mul;
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const KIND: Kind = $kind;
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type Interrupt = crate::interrupt::$irq;
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type Interrupt = crate::interrupt::$irq;
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fn regs() -> Regs {
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fn regs() -> Regs {
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@ -1104,21 +1174,19 @@ macro_rules! impl_lpuart {
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}
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}
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foreach_interrupt!(
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foreach_interrupt!(
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($inst:ident, lpuart, $block:ident, $signal_name:ident, $irq:ident) => {
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($inst:ident, usart, LPUART, $signal_name:ident, $irq:ident) => {
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impl_lpuart!($inst, $irq, 256);
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impl_usart!($inst, $irq, Kind::Lpuart);
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};
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};
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($inst:ident, usart, $block:ident, $signal_name:ident, $irq:ident) => {
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($inst:ident, usart, $block:ident, $signal_name:ident, $irq:ident) => {
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impl_lpuart!($inst, $irq, 1);
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impl_usart!($inst, $irq, Kind::Uart);
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impl sealed::FullInstance for peripherals::$inst {
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impl sealed::FullInstance for peripherals::$inst {
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fn regs_uart() -> crate::pac::usart::Usart {
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fn regs_uart() -> crate::pac::usart::Usart {
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crate::pac::$inst
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crate::pac::$inst
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}
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}
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}
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}
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impl FullInstance for peripherals::$inst {
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impl FullInstance for peripherals::$inst {}
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}
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};
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};
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);
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);
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